forked from suyu/suyu
56 lines
1.9 KiB
C++
56 lines
1.9 KiB
C++
// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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void BFI(TranslatorVisitor& v, u64 insn, const IR::U32& src_a, const IR::U32& base) {
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union {
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u64 insn;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 8, IR::Reg> insert_reg;
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} const bfi{insn};
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const IR::U32 offset{v.ir.BitFieldExtract(src_a, v.ir.Imm32(0), v.ir.Imm32(8), false)};
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const IR::U32 unsafe_count{v.ir.BitFieldExtract(src_a, v.ir.Imm32(8), v.ir.Imm32(8), false)};
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const IR::U32 max_size{v.ir.Imm32(32)};
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// Edge case conditions
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const IR::U1 zero_offset{v.ir.IEqual(offset, v.ir.Imm32(0))};
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const IR::U1 exceed_offset{v.ir.IGreaterThanEqual(offset, max_size, false)};
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const IR::U1 exceed_count{v.ir.IGreaterThanEqual(unsafe_count, max_size, false)};
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const IR::U32 remaining_size{v.ir.ISub(max_size, offset)};
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const IR::U32 safe_count{v.ir.Select(exceed_count, remaining_size, unsafe_count)};
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const IR::U32 insert{v.X(bfi.insert_reg)};
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IR::U32 result{v.ir.BitFieldInsert(base, insert, offset, safe_count)};
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result = IR::U32{v.ir.Select(exceed_offset, base, result)};
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result = IR::U32{v.ir.Select(zero_offset, base, result)};
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v.X(bfi.dest_reg, result);
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}
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} // Anonymous namespace
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void TranslatorVisitor::BFI_reg(u64 insn) {
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BFI(*this, insn, GetReg20(insn), GetReg39(insn));
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}
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void TranslatorVisitor::BFI_rc(u64 insn) {
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BFI(*this, insn, GetReg39(insn), GetCbuf(insn));
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}
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void TranslatorVisitor::BFI_cr(u64 insn) {
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BFI(*this, insn, GetCbuf(insn), GetReg39(insn));
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}
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void TranslatorVisitor::BFI_imm(u64 insn) {
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BFI(*this, insn, GetImm20(insn), GetReg39(insn));
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}
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} // namespace Shader::Maxwell
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