forked from suyu/suyu
54 lines
1.8 KiB
C++
54 lines
1.8 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/shader/node_helper.h"
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#include "video_core/shader/shader_ir.h"
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namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeArithmeticHalfImmediate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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if (opcode->get().GetId() == OpCode::Id::HADD2_IMM) {
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if (instr.alu_half_imm.ftz == 0) {
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LOG_DEBUG(HW_GPU, "{} without FTZ is not implemented", opcode->get().GetName());
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}
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} else {
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if (instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::FTZ) {
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LOG_DEBUG(HW_GPU, "{} without FTZ is not implemented", opcode->get().GetName());
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}
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}
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half_imm.type_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.alu_half_imm.abs_a, instr.alu_half_imm.negate_a);
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const Node op_b = UnpackHalfImmediate(instr, true);
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Node value = [&]() {
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switch (opcode->get().GetId()) {
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case OpCode::Id::HADD2_IMM:
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return Operation(OperationCode::HAdd, PRECISE, op_a, op_b);
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case OpCode::Id::HMUL2_IMM:
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return Operation(OperationCode::HMul, PRECISE, op_a, op_b);
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default:
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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value = GetSaturatedHalfFloat(value, instr.alu_half_imm.saturate);
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value = HalfMerge(GetRegister(instr.gpr0), value, instr.alu_half_imm.merge);
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SetRegister(bb, instr.gpr0, value);
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return pc;
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}
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} // namespace VideoCommon::Shader
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