forked from suyu/suyu
9764c13d6d
The current texture cache has several points that hurt maintainability and performance. It's easy to break unrelated parts of the cache when doing minor changes. The cache can easily forget valuable information about the cached textures by CPU writes or simply by its normal usage.The current texture cache has several points that hurt maintainability and performance. It's easy to break unrelated parts of the cache when doing minor changes. The cache can easily forget valuable information about the cached textures by CPU writes or simply by its normal usage. This commit aims to address those issues.
82 lines
2.4 KiB
C++
82 lines
2.4 KiB
C++
// Copyright 2020 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <algorithm>
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#include <vector>
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#include "common/common_types.h"
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#include "common/div_ceil.h"
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#include "common/logging/log.h"
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#include "video_core/memory_manager.h"
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#include "video_core/rasterizer_interface.h"
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namespace VideoCommon {
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template <typename Descriptor>
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class DescriptorTable {
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public:
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explicit DescriptorTable(Tegra::MemoryManager& gpu_memory_) : gpu_memory{gpu_memory_} {}
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[[nodiscard]] bool Synchornize(GPUVAddr gpu_addr, u32 limit) {
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[[likely]] if (current_gpu_addr == gpu_addr && current_limit == limit) {
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return false;
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}
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Refresh(gpu_addr, limit);
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return true;
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}
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void Invalidate() noexcept {
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std::ranges::fill(read_descriptors, 0);
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}
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[[nodiscard]] std::pair<Descriptor, bool> Read(u32 index) {
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DEBUG_ASSERT(index <= current_limit);
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const GPUVAddr gpu_addr = current_gpu_addr + index * sizeof(Descriptor);
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std::pair<Descriptor, bool> result;
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gpu_memory.ReadBlockUnsafe(gpu_addr, &result.first, sizeof(Descriptor));
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if (IsDescriptorRead(index)) {
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result.second = result.first != descriptors[index];
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} else {
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MarkDescriptorAsRead(index);
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result.second = true;
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}
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if (result.second) {
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descriptors[index] = result.first;
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}
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return result;
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}
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[[nodiscard]] u32 Limit() const noexcept {
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return current_limit;
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}
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private:
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void Refresh(GPUVAddr gpu_addr, u32 limit) {
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current_gpu_addr = gpu_addr;
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current_limit = limit;
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const size_t num_descriptors = static_cast<size_t>(limit) + 1;
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read_descriptors.clear();
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read_descriptors.resize(Common::DivCeil(num_descriptors, 64U), 0);
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descriptors.resize(num_descriptors);
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}
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void MarkDescriptorAsRead(u32 index) noexcept {
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read_descriptors[index / 64] |= 1ULL << (index % 64);
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}
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[[nodiscard]] bool IsDescriptorRead(u32 index) const noexcept {
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return (read_descriptors[index / 64] & (1ULL << (index % 64))) != 0;
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}
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Tegra::MemoryManager& gpu_memory;
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GPUVAddr current_gpu_addr{};
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u32 current_limit{};
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std::vector<u64> read_descriptors;
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std::vector<Descriptor> descriptors;
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};
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} // namespace VideoCommon
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