forked from suyu/suyu
278 lines
10 KiB
C++
278 lines
10 KiB
C++
// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <tuple>
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#include "shader_recompiler/backend/spirv/emit_spirv.h"
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namespace Shader::Backend::SPIRV {
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namespace {
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struct AttrInfo {
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Id pointer;
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Id id;
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bool needs_cast;
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};
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std::optional<AttrInfo> AttrTypes(EmitContext& ctx, u32 index) {
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const AttributeType type{ctx.profile.generic_input_types.at(index)};
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switch (type) {
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case AttributeType::Float:
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return AttrInfo{ctx.input_f32, ctx.F32[1], false};
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case AttributeType::UnsignedInt:
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return AttrInfo{ctx.input_u32, ctx.U32[1], true};
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case AttributeType::SignedInt:
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return AttrInfo{ctx.input_s32, ctx.TypeInt(32, true), true};
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case AttributeType::Disabled:
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return std::nullopt;
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}
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throw InvalidArgument("Invalid attribute type {}", type);
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}
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Id OutputAttrPointer(EmitContext& ctx, IR::Attribute attr) {
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const u32 element{static_cast<u32>(attr) % 4};
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const auto element_id{[&] { return ctx.Constant(ctx.U32[1], element); }};
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if (IR::IsGeneric(attr)) {
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const u32 index{IR::GenericAttributeIndex(attr)};
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return ctx.OpAccessChain(ctx.output_f32, ctx.output_generics.at(index), element_id());
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}
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switch (attr) {
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case IR::Attribute::PointSize:
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return ctx.output_point_size;
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case IR::Attribute::PositionX:
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case IR::Attribute::PositionY:
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case IR::Attribute::PositionZ:
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case IR::Attribute::PositionW:
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return ctx.OpAccessChain(ctx.output_f32, ctx.output_position, element_id());
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case IR::Attribute::ClipDistance0:
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case IR::Attribute::ClipDistance1:
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case IR::Attribute::ClipDistance2:
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case IR::Attribute::ClipDistance3:
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case IR::Attribute::ClipDistance4:
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case IR::Attribute::ClipDistance5:
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case IR::Attribute::ClipDistance6:
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case IR::Attribute::ClipDistance7: {
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const u32 base{static_cast<u32>(IR::Attribute::ClipDistance0)};
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const u32 index{static_cast<u32>(attr) - base};
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const Id clip_num{ctx.Constant(ctx.U32[1], index)};
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return ctx.OpAccessChain(ctx.output_f32, ctx.clip_distances, clip_num);
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}
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default:
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throw NotImplementedException("Read attribute {}", attr);
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}
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}
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} // Anonymous namespace
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void EmitGetRegister(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitSetRegister(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitGetPred(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitSetPred(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitSetGotoVariable(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitGetGotoVariable(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitSetIndirectBranchVariable(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitGetIndirectBranchVariable(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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static Id GetCbuf(EmitContext& ctx, Id result_type, Id UniformDefinitions::*member_ptr,
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u32 element_size, const IR::Value& binding, const IR::Value& offset) {
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if (!binding.IsImmediate()) {
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throw NotImplementedException("Constant buffer indexing");
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}
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const Id cbuf{ctx.cbufs[binding.U32()].*member_ptr};
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const Id uniform_type{ctx.uniform_types.*member_ptr};
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if (!offset.IsImmediate()) {
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Id index{ctx.Def(offset)};
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if (element_size > 1) {
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const u32 log2_element_size{static_cast<u32>(std::countr_zero(element_size))};
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const Id shift{ctx.Constant(ctx.U32[1], log2_element_size)};
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index = ctx.OpShiftRightArithmetic(ctx.U32[1], ctx.Def(offset), shift);
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}
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const Id access_chain{ctx.OpAccessChain(uniform_type, cbuf, ctx.u32_zero_value, index)};
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return ctx.OpLoad(result_type, access_chain);
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}
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if (offset.U32() % element_size != 0) {
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throw NotImplementedException("Unaligned immediate constant buffer load");
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}
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const Id imm_offset{ctx.Constant(ctx.U32[1], offset.U32() / element_size)};
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const Id access_chain{ctx.OpAccessChain(uniform_type, cbuf, ctx.u32_zero_value, imm_offset)};
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return ctx.OpLoad(result_type, access_chain);
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}
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Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
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const Id load{GetCbuf(ctx, ctx.U8, &UniformDefinitions::U8, sizeof(u8), binding, offset)};
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return ctx.OpUConvert(ctx.U32[1], load);
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}
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Id EmitGetCbufS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
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const Id load{GetCbuf(ctx, ctx.S8, &UniformDefinitions::S8, sizeof(s8), binding, offset)};
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return ctx.OpSConvert(ctx.U32[1], load);
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}
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Id EmitGetCbufU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
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const Id load{GetCbuf(ctx, ctx.U16, &UniformDefinitions::U16, sizeof(u16), binding, offset)};
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return ctx.OpUConvert(ctx.U32[1], load);
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}
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Id EmitGetCbufS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
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const Id load{GetCbuf(ctx, ctx.S16, &UniformDefinitions::S16, sizeof(s16), binding, offset)};
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return ctx.OpSConvert(ctx.U32[1], load);
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}
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Id EmitGetCbufU32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
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return GetCbuf(ctx, ctx.U32[1], &UniformDefinitions::U32, sizeof(u32), binding, offset);
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}
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Id EmitGetCbufF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
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return GetCbuf(ctx, ctx.F32[1], &UniformDefinitions::F32, sizeof(f32), binding, offset);
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}
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Id EmitGetCbufU64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
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return GetCbuf(ctx, ctx.U64, &UniformDefinitions::U64, sizeof(u64), binding, offset);
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}
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Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr) {
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const u32 element{static_cast<u32>(attr) % 4};
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const auto element_id{[&] { return ctx.Constant(ctx.U32[1], element); }};
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if (IR::IsGeneric(attr)) {
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const u32 index{IR::GenericAttributeIndex(attr)};
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const std::optional<AttrInfo> type{AttrTypes(ctx, index)};
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if (!type) {
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// Attribute is disabled
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return ctx.Constant(ctx.F32[1], 0.0f);
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}
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const Id generic_id{ctx.input_generics.at(index)};
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const Id pointer{ctx.OpAccessChain(type->pointer, generic_id, element_id())};
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const Id value{ctx.OpLoad(type->id, pointer)};
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return type->needs_cast ? ctx.OpBitcast(ctx.F32[1], value) : value;
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}
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switch (attr) {
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case IR::Attribute::PositionX:
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case IR::Attribute::PositionY:
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case IR::Attribute::PositionZ:
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case IR::Attribute::PositionW:
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return ctx.OpLoad(ctx.F32[1],
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ctx.OpAccessChain(ctx.input_f32, ctx.input_position, element_id()));
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case IR::Attribute::InstanceId:
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if (ctx.profile.support_vertex_instance_id) {
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return ctx.OpLoad(ctx.U32[1], ctx.instance_id);
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} else {
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return ctx.OpISub(ctx.U32[1], ctx.OpLoad(ctx.U32[1], ctx.instance_index),
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ctx.OpLoad(ctx.U32[1], ctx.base_instance));
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}
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case IR::Attribute::VertexId:
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if (ctx.profile.support_vertex_instance_id) {
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return ctx.OpLoad(ctx.U32[1], ctx.vertex_id);
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} else {
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return ctx.OpISub(ctx.U32[1], ctx.OpLoad(ctx.U32[1], ctx.vertex_index),
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ctx.OpLoad(ctx.U32[1], ctx.base_vertex));
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}
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case IR::Attribute::FrontFace:
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return ctx.OpSelect(ctx.U32[1], ctx.OpLoad(ctx.U1, ctx.front_face),
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ctx.Constant(ctx.U32[1], std::numeric_limits<u32>::max()),
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ctx.u32_zero_value);
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case IR::Attribute::PointSpriteS:
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return ctx.OpLoad(ctx.F32[1], ctx.OpAccessChain(ctx.input_f32, ctx.point_coord,
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ctx.Constant(ctx.U32[1], 0U)));
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case IR::Attribute::PointSpriteT:
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return ctx.OpLoad(ctx.F32[1], ctx.OpAccessChain(ctx.input_f32, ctx.point_coord,
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ctx.Constant(ctx.U32[1], 1U)));
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default:
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throw NotImplementedException("Read attribute {}", attr);
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}
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}
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void EmitSetAttribute(EmitContext& ctx, IR::Attribute attr, Id value) {
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ctx.OpStore(OutputAttrPointer(ctx, attr), value);
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}
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void EmitGetAttributeIndexed(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitSetAttributeIndexed(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitSetFragColor(EmitContext& ctx, u32 index, u32 component, Id value) {
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const Id component_id{ctx.Constant(ctx.U32[1], component)};
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const Id pointer{ctx.OpAccessChain(ctx.output_f32, ctx.frag_color.at(index), component_id)};
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ctx.OpStore(pointer, value);
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}
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void EmitSetFragDepth(EmitContext& ctx, Id value) {
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ctx.OpStore(ctx.frag_depth, value);
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}
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void EmitGetZFlag(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitGetSFlag(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitGetCFlag(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitGetOFlag(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitSetZFlag(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitSetSFlag(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitSetCFlag(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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void EmitSetOFlag(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitWorkgroupId(EmitContext& ctx) {
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return ctx.OpLoad(ctx.U32[3], ctx.workgroup_id);
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}
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Id EmitLocalInvocationId(EmitContext& ctx) {
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return ctx.OpLoad(ctx.U32[3], ctx.local_invocation_id);
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}
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Id EmitLoadLocal(EmitContext& ctx, Id word_offset) {
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const Id pointer{ctx.OpAccessChain(ctx.private_u32, ctx.local_memory, word_offset)};
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return ctx.OpLoad(ctx.U32[1], pointer);
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}
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void EmitWriteLocal(EmitContext& ctx, Id word_offset, Id value) {
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const Id pointer{ctx.OpAccessChain(ctx.private_u32, ctx.local_memory, word_offset)};
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ctx.OpStore(pointer, value);
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}
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} // namespace Shader::Backend::SPIRV
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