Linuxydable/suyu
1
0
Fork 0
forked from suyu/suyu
Code Pull requests Activity
2073 commits 1 branch 3 tags 305 MiB
Commit graph

90 commits

Author SHA1 Message Date
Lioncash
9fdb311d6e dyncom: Make Load/Store instructions support big endian 2015-03-17 15:13:32 -04:00
Lioncash
f280806214 dyncom: Implement SETEND 2015-03-14 23:08:36 -04:00
Lioncash
e34ba68e1f dyncom: Minor cleanup 
Assemblers will exit with an error when trying to assemble instructions with disallowed registers.
 2015-03-10 08:13:58 -04:00
Lioncash
386dbab5ea dyncom: Fix an indexing bug in STM 
Previously it would write the contents of register 13 for the case where the link register (r14) is supposed to be written.
 2015-03-08 22:03:11 -04:00
Lioncash
36dab56c31 dyncom: General cleanup of STM 2015-03-08 22:03:06 -04:00
Lioncash
e37425b380 dyncom: Increment addr when accessing LR in LDM 2015-03-08 21:46:57 -04:00
Yuri Kunde Schlesner
cd1fbfcf1b Add profiling infrastructure and widget 2015-03-01 21:47:13 -03:00
Lioncash
8812d2fbdb arm: The CP15 Main ID register is not writeable 2015-02-26 09:28:31 -05:00
Kevin Hartman
05c098a9e7 Cleaned up unaligned access. 2015-02-21 17:25:31 -08:00
Lioncash
a7120662e6 dyncom: Support conditional BKPT instructions 2015-02-17 01:37:22 -05:00
Lioncash
012d1e32ad dyncom: Actually set the destination register for USAD8/USADA8. 
Idiotville: Population: 1 - Inhabitant name: Lioncash
 2015-02-16 01:03:01 -05:00
Lioncash
0c6434c379 core: Apply static to local functions 2015-02-13 10:48:32 -05:00
Lioncash
a75e1ff6e6 arm: General cleanup 
- Remove several typedefs for ARMul_State.
- Remove unused functions
- Remove unused/unnecessary headers
- Removed unused enums, etc.
 2015-02-13 09:11:12 -05:00
Lioncash
df9e0c0f81 dyncom: Remove warning for SXTAH 
This is tested to work correctly.
 2015-02-12 20:11:20 -05:00
Lioncash
3eccc66abf dyncom: Add more regs to MCR/MRC 
Adds the registers that were left out of some coprocessor ranges.
 2015-02-10 09:34:42 -05:00
Lioncash
3a5a39c6aa dyncom: Remove more unnecessary code 2015-02-03 14:05:53 -05:00
Lioncash
676daef3c7 core: Fix some warnings on OSX 2015-02-03 08:14:42 -05:00
Lioncash
f44781fd7b arm: Adios armemu 2015-01-31 20:43:03 -05:00
Lioncash
7a3e371141 dyncom: Minor cleanup 
Narrow scopes for the instruction variables. Remove unnecessary parentheses.
 2015-01-27 08:51:18 -05:00
Lioncash
8810dfe1de dyncom: Minor cleanup 
Removes some unused macros and cleans up indentation inconsistencies
 2015-01-22 09:39:41 -05:00
Lioncash
8c6edc680c dyncom: Clarify precedence for ternary statements 2015-01-19 20:35:55 -05:00
Lioncash
a873f157d0 dyncom: Implement missing shifts in ScaledRegisterPostIndexed, etc 2015-01-18 18:32:02 -05:00
Lioncash
8575010a68 dyncom: Handle the ARM A2 encoding of STRT/LDRT 
These were also missing the shifted register case.
 2015-01-17 13:53:35 -05:00
Lioncash
0a5d450e94 dyncom: Handle the ARM A2 encoding of LDRBT/STRBT. 2015-01-16 21:05:27 -05:00
Lioncash
f7770b83d4 dyncom: Fix 32-bit ASR shifts for immediates 2015-01-12 14:15:24 -05:00
Lioncash
e16b35eb53 dyncom: Remove unused flag macros 2015-01-12 12:57:15 -05:00
Lioncash
2843d1b98b dyncom: Get rid of unnecessary outer-scope variables in InterpreterMainLoop 2015-01-12 01:11:46 -05:00
Lioncash
3ace75a49f dyncom: Fix overflow flag setting for ADD/RSB/RSC/SUB/SBC 
Also cleans up CMN, and CMP.
 2015-01-12 01:03:58 -05:00
Lioncash
9c2c89b7e1 dyncom: Add a helper function for addition with a carry 2015-01-12 00:44:28 -05:00
Lioncash
d2a05bbbc6 dyncom: Fix ADC overflow flag setting 2015-01-11 22:27:09 -05:00
Lioncash
eabfa5cf43 dyncom: Fix conditional execution of MSR 2015-01-11 18:45:45 -05:00
Lioncash
1cef6e92d5 dyncom: Fix UMAAL 
These need to be done as a 64-bit operation.
 2015-01-08 11:09:21 -05:00
Lioncash
df5e0f9f28 dyncom: Fix SMULWB/SMULWT 
Wasn't doing proper sign-extension
 2015-01-07 16:41:08 -05:00
bunnei
317fe1e528 Merge pull request #438 from lioncash/swp 
dyncom: Fix SWPB
 2015-01-07 09:53:29 -05:00
Lioncash
75c211c10f dyncom: Fix SWPB 2015-01-07 09:36:06 -05:00
Lioncash
511e13f3e3 dyncom: Move over SMLALXY 2015-01-07 00:53:56 -05:00
bunnei
89bb0ecbd5 Merge pull request #417 from kevinhartman/exclusive-tag-fix 
Added exclusive reservation granule from ARMv7 spec to dyncom...
 2015-01-06 12:42:10 -05:00
Kevin Hartman
8132c01830 Added exclusive reservation granule from ARMv7 spec to dyncom to protect LDR/STREX. 2015-01-05 22:29:51 -05:00
Lioncash
f75def619c dyncom: Partially emulate BXJ 
Just in case some game studio let the intern write inline assembly or something.
 2015-01-05 15:55:09 -05:00
Lioncash
e08a39a2f4 dyncom: Actually set the Q flag for SMLABB/SMLABT/SMLATB/SMLATT 
Easy skyeye todo fix.
 2015-01-05 10:41:02 -05:00
bunnei
8b1ec1a82a Merge pull request #418 from lioncash/qd 
dyncom: Implement QADD/QSUB/QDADD/QDSUB
 2015-01-05 09:59:12 -05:00
Lioncash
d00c22c706 dyncom: Implement QADD/QSUB/QDADD/QDSUB 2015-01-05 09:13:41 -05:00
Lioncash
41e1cb12e5 skyeye: Remove duplicate typedefs 
citra already has its own typedefs like this.
 2015-01-04 12:34:02 -05:00
Lioncash
6adc0a4622 dyncom: Implement SMLAW 2015-01-03 03:13:49 -05:00
bunnei
dd21f986b8 Merge pull request #395 from lioncash/rev 
dyncom: Implement REVSH
 2015-01-02 22:44:39 -05:00
Lioncash
2f19acf064 dyncom: Implement REVSH 
Also joins the REV ops into one common place.
 2015-01-02 22:40:43 -05:00
Lioncash
e0e54f55d7 dyncom: Implement SMLALD/SMLSLD 2015-01-02 22:08:26 -05:00
bunnei
3e230d6c9e Merge pull request #392 from lioncash/sm 
dyncom: Implement SMMLA/SMMUL/SMMLS
 2015-01-02 21:47:53 -05:00
Lioncash
64161bcb41 dyncom: Implement SMMLA/SMMUL/SMMLS 2015-01-02 21:40:29 -05:00
bunnei
dd8a57cb80 dyncom: Implemented LDREXD/STREXD/LDREXH/STREXH 2015-01-02 20:51:54 -05:00