Commit graph

107 commits

Author SHA1 Message Date
Lioncash
0530fd2499 dyncom: Make translation-unit functions and variables static 2015-05-14 14:32:07 -04:00
Lioncash
f3c4de4ce4 dyncom: Remove unnecessary typedefs 2015-05-14 11:51:46 -04:00
Lioncash
a48b4ec583 dyncom: Remove unused structs 2015-05-14 11:33:50 -04:00
Lioncash
832c130ed1 dyncom: Fix decoding of BKPT's immediate
A shift here is intended since the representation is imm12:imm4
2015-05-13 14:11:03 -04:00
Lioncash
dc7ac751f2 dyncom: Stub MCRR and MRRC
There's no other coprocessor outside the VFP (which has its own VMOV variants) in which the MPCore can send/retrieve data from.
Stubbed so citra won't crash and burn on the odd chance someone actually tries to use these.
2015-05-11 18:31:45 -04:00
Lioncash
31dc8b8890 dyncom: Remove an unnecessary variable in the interpreter
All this was doing was needlessly aliasing a variable.
2015-05-07 19:34:04 -04:00
Yuri Kunde Schlesner
ecff2351a1 HLE: Clean up SVC dispatch mechanism 2015-05-06 00:24:39 -03:00
bunnei
bab5abaf46 Dyncom: Move cream cache to ARMul_State. 2015-05-01 18:27:04 -04:00
Lioncash
a6c9e453b2 dyncom: Remove unnecessary enum and typedef
Also fixes descriptions in the process.
2015-04-07 08:05:41 -04:00
bunnei
14dcd98653 Merge pull request #685 from lioncash/cpregs
dyncom: Set the MPCore CP15 register reset values on initialization.
2015-04-06 15:06:07 -04:00
Lioncash
b7b8b67620 Move CP15 enum definitions into their own enum.
Also gets rid of preprocessor mumbo-jumbo
2015-04-06 12:48:35 -04:00
Lioncash
bb7dac022e dyncom: Suppress uninitialized variable warnings
The switch cases will always be hit, but this makes compilers stop complaining.
2015-04-05 23:49:06 -04:00
Lioncash
490df716f3 dyncom: Move CP15 register writing into its own function.
Also implements writing to the rest of the ARM11 MPCore CP15 register set.
2015-04-02 00:20:52 -04:00
Lioncash
5e5954c63b dyncom: Move CP15 register reading into its own function.
Keeps everything contained. Added all supported readable registers in an ARM11 MPCore.
2015-04-02 00:19:11 -04:00
Lioncash
de6eba0288 dyncom: Migrate InAPrivilegedMode to armsupp
It's a generic helper function, so it should be here anyway.
2015-03-26 09:22:02 -04:00
Lioncash
a80d93685a dyncom: Implement SRS 2015-03-24 12:44:31 -04:00
Lioncash
cde671795c dyncom: Implement RFE 2015-03-24 11:34:48 -04:00
Lioncash
9fdb311d6e dyncom: Make Load/Store instructions support big endian 2015-03-17 15:13:32 -04:00
Lioncash
f280806214 dyncom: Implement SETEND 2015-03-14 23:08:36 -04:00
Lioncash
e34ba68e1f dyncom: Minor cleanup
Assemblers will exit with an error when trying to assemble instructions with disallowed registers.
2015-03-10 08:13:58 -04:00
Lioncash
386dbab5ea dyncom: Fix an indexing bug in STM
Previously it would write the contents of register 13 for the case where the link register (r14) is supposed to be written.
2015-03-08 22:03:11 -04:00
Lioncash
36dab56c31 dyncom: General cleanup of STM 2015-03-08 22:03:06 -04:00
Lioncash
e37425b380 dyncom: Increment addr when accessing LR in LDM 2015-03-08 21:46:57 -04:00
Yuri Kunde Schlesner
cd1fbfcf1b Add profiling infrastructure and widget 2015-03-01 21:47:13 -03:00
Lioncash
8812d2fbdb arm: The CP15 Main ID register is not writeable 2015-02-26 09:28:31 -05:00
Kevin Hartman
05c098a9e7 Cleaned up unaligned access. 2015-02-21 17:25:31 -08:00
Lioncash
a7120662e6 dyncom: Support conditional BKPT instructions 2015-02-17 01:37:22 -05:00
Lioncash
012d1e32ad dyncom: Actually set the destination register for USAD8/USADA8.
Idiotville: Population: 1 - Inhabitant name: Lioncash
2015-02-16 01:03:01 -05:00
Lioncash
0c6434c379 core: Apply static to local functions 2015-02-13 10:48:32 -05:00
Lioncash
a75e1ff6e6 arm: General cleanup
- Remove several typedefs for ARMul_State.
- Remove unused functions
- Remove unused/unnecessary headers
- Removed unused enums, etc.
2015-02-13 09:11:12 -05:00
Lioncash
df9e0c0f81 dyncom: Remove warning for SXTAH
This is tested to work correctly.
2015-02-12 20:11:20 -05:00
Lioncash
3eccc66abf dyncom: Add more regs to MCR/MRC
Adds the registers that were left out of some coprocessor ranges.
2015-02-10 09:34:42 -05:00
Lioncash
3a5a39c6aa dyncom: Remove more unnecessary code 2015-02-03 14:05:53 -05:00
Lioncash
676daef3c7 core: Fix some warnings on OSX 2015-02-03 08:14:42 -05:00
Lioncash
f44781fd7b arm: Adios armemu 2015-01-31 20:43:03 -05:00
Lioncash
7a3e371141 dyncom: Minor cleanup
Narrow scopes for the instruction variables. Remove unnecessary parentheses.
2015-01-27 08:51:18 -05:00
Lioncash
8810dfe1de dyncom: Minor cleanup
Removes some unused macros and cleans up indentation inconsistencies
2015-01-22 09:39:41 -05:00
Lioncash
8c6edc680c dyncom: Clarify precedence for ternary statements 2015-01-19 20:35:55 -05:00
Lioncash
a873f157d0 dyncom: Implement missing shifts in ScaledRegisterPostIndexed, etc 2015-01-18 18:32:02 -05:00
Lioncash
8575010a68 dyncom: Handle the ARM A2 encoding of STRT/LDRT
These were also missing the shifted register case.
2015-01-17 13:53:35 -05:00
Lioncash
0a5d450e94 dyncom: Handle the ARM A2 encoding of LDRBT/STRBT. 2015-01-16 21:05:27 -05:00
Lioncash
f7770b83d4 dyncom: Fix 32-bit ASR shifts for immediates 2015-01-12 14:15:24 -05:00
Lioncash
e16b35eb53 dyncom: Remove unused flag macros 2015-01-12 12:57:15 -05:00
Lioncash
2843d1b98b dyncom: Get rid of unnecessary outer-scope variables in InterpreterMainLoop 2015-01-12 01:11:46 -05:00
Lioncash
3ace75a49f dyncom: Fix overflow flag setting for ADD/RSB/RSC/SUB/SBC
Also cleans up CMN, and CMP.
2015-01-12 01:03:58 -05:00
Lioncash
9c2c89b7e1 dyncom: Add a helper function for addition with a carry 2015-01-12 00:44:28 -05:00
Lioncash
d2a05bbbc6 dyncom: Fix ADC overflow flag setting 2015-01-11 22:27:09 -05:00
Lioncash
eabfa5cf43 dyncom: Fix conditional execution of MSR 2015-01-11 18:45:45 -05:00
Lioncash
1cef6e92d5 dyncom: Fix UMAAL
These need to be done as a 64-bit operation.
2015-01-08 11:09:21 -05:00
Lioncash
df5e0f9f28 dyncom: Fix SMULWB/SMULWT
Wasn't doing proper sign-extension
2015-01-07 16:41:08 -05:00