2019-05-31 01:34:02 +02:00
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/*
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* Copyright (c) 2018-2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Adapted by DarkLordZach for use/interaction with yuzu
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*
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* Modifications Copyright 2019 yuzu emulator team
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* Licensed under GPLv2 or any later version
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* Refer to the license.txt file included.
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*/
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#pragma once
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2019-09-22 00:13:10 +02:00
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#include <variant>
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2019-05-31 01:34:02 +02:00
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#include <vector>
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#include <fmt/printf.h>
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#include "common/common_types.h"
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#include "core/memory/dmnt_cheat_types.h"
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2020-03-31 21:10:44 +02:00
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namespace Core::Memory {
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2019-05-31 01:34:02 +02:00
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2019-09-22 00:13:10 +02:00
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enum class CheatVmOpcodeType : u32 {
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StoreStatic = 0,
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BeginConditionalBlock = 1,
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EndConditionalBlock = 2,
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ControlLoop = 3,
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LoadRegisterStatic = 4,
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LoadRegisterMemory = 5,
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StoreStaticToAddress = 6,
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PerformArithmeticStatic = 7,
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BeginKeypressConditionalBlock = 8,
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// These are not implemented by Gateway's VM.
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PerformArithmeticRegister = 9,
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StoreRegisterToAddress = 10,
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Reserved11 = 11,
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// This is a meta entry, and not a real opcode.
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// This is to facilitate multi-nybble instruction decoding.
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ExtendedWidth = 12,
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// Extended width opcodes.
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BeginRegisterConditionalBlock = 0xC0,
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SaveRestoreRegister = 0xC1,
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SaveRestoreRegisterMask = 0xC2,
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ReadWriteStaticRegister = 0xC3,
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// This is a meta entry, and not a real opcode.
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// This is to facilitate multi-nybble instruction decoding.
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DoubleExtendedWidth = 0xF0,
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// Double-extended width opcodes.
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DebugLog = 0xFFF,
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};
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enum class MemoryAccessType : u32 {
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MainNso = 0,
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Heap = 1,
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};
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enum class ConditionalComparisonType : u32 {
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GT = 1,
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GE = 2,
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LT = 3,
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LE = 4,
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EQ = 5,
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NE = 6,
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};
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enum class RegisterArithmeticType : u32 {
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Addition = 0,
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Subtraction = 1,
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Multiplication = 2,
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LeftShift = 3,
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RightShift = 4,
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// These are not supported by Gateway's VM.
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LogicalAnd = 5,
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LogicalOr = 6,
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LogicalNot = 7,
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LogicalXor = 8,
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None = 9,
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};
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enum class StoreRegisterOffsetType : u32 {
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None = 0,
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Reg = 1,
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Imm = 2,
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MemReg = 3,
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MemImm = 4,
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MemImmReg = 5,
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};
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enum class CompareRegisterValueType : u32 {
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MemoryRelAddr = 0,
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MemoryOfsReg = 1,
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RegisterRelAddr = 2,
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RegisterOfsReg = 3,
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StaticValue = 4,
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OtherRegister = 5,
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};
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enum class SaveRestoreRegisterOpType : u32 {
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Restore = 0,
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Save = 1,
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ClearSaved = 2,
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ClearRegs = 3,
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};
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enum class DebugLogValueType : u32 {
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MemoryRelAddr = 0,
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MemoryOfsReg = 1,
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RegisterRelAddr = 2,
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RegisterOfsReg = 3,
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RegisterValue = 4,
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};
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union VmInt {
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u8 bit8;
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u16 bit16;
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u32 bit32;
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u64 bit64;
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};
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struct StoreStaticOpcode {
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u32 bit_width{};
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MemoryAccessType mem_type{};
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u32 offset_register{};
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u64 rel_address{};
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VmInt value{};
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};
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struct BeginConditionalOpcode {
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u32 bit_width{};
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MemoryAccessType mem_type{};
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ConditionalComparisonType cond_type{};
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u64 rel_address{};
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VmInt value{};
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};
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struct EndConditionalOpcode {};
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struct ControlLoopOpcode {
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bool start_loop{};
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u32 reg_index{};
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u32 num_iters{};
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};
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struct LoadRegisterStaticOpcode {
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u32 reg_index{};
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u64 value{};
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};
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struct LoadRegisterMemoryOpcode {
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u32 bit_width{};
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MemoryAccessType mem_type{};
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u32 reg_index{};
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bool load_from_reg{};
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u64 rel_address{};
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};
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struct StoreStaticToAddressOpcode {
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u32 bit_width{};
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u32 reg_index{};
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bool increment_reg{};
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bool add_offset_reg{};
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u32 offset_reg_index{};
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u64 value{};
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};
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struct PerformArithmeticStaticOpcode {
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u32 bit_width{};
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u32 reg_index{};
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RegisterArithmeticType math_type{};
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u32 value{};
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};
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struct BeginKeypressConditionalOpcode {
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u32 key_mask{};
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};
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struct PerformArithmeticRegisterOpcode {
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u32 bit_width{};
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RegisterArithmeticType math_type{};
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u32 dst_reg_index{};
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u32 src_reg_1_index{};
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u32 src_reg_2_index{};
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bool has_immediate{};
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VmInt value{};
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};
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struct StoreRegisterToAddressOpcode {
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u32 bit_width{};
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u32 str_reg_index{};
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u32 addr_reg_index{};
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bool increment_reg{};
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StoreRegisterOffsetType ofs_type{};
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MemoryAccessType mem_type{};
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u32 ofs_reg_index{};
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u64 rel_address{};
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};
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struct BeginRegisterConditionalOpcode {
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u32 bit_width{};
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ConditionalComparisonType cond_type{};
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u32 val_reg_index{};
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CompareRegisterValueType comp_type{};
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MemoryAccessType mem_type{};
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u32 addr_reg_index{};
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u32 other_reg_index{};
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u32 ofs_reg_index{};
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u64 rel_address{};
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VmInt value{};
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};
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struct SaveRestoreRegisterOpcode {
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u32 dst_index{};
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u32 src_index{};
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SaveRestoreRegisterOpType op_type{};
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};
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struct SaveRestoreRegisterMaskOpcode {
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SaveRestoreRegisterOpType op_type{};
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std::array<bool, 0x10> should_operate{};
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};
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struct ReadWriteStaticRegisterOpcode {
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u32 static_idx{};
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u32 idx{};
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};
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struct DebugLogOpcode {
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u32 bit_width{};
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u32 log_id{};
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DebugLogValueType val_type{};
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MemoryAccessType mem_type{};
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u32 addr_reg_index{};
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u32 val_reg_index{};
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u32 ofs_reg_index{};
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u64 rel_address{};
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};
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struct UnrecognizedInstruction {
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CheatVmOpcodeType opcode{};
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};
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struct CheatVmOpcode {
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bool begin_conditional_block{};
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std::variant<StoreStaticOpcode, BeginConditionalOpcode, EndConditionalOpcode, ControlLoopOpcode,
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LoadRegisterStaticOpcode, LoadRegisterMemoryOpcode, StoreStaticToAddressOpcode,
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PerformArithmeticStaticOpcode, BeginKeypressConditionalOpcode,
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PerformArithmeticRegisterOpcode, StoreRegisterToAddressOpcode,
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BeginRegisterConditionalOpcode, SaveRestoreRegisterOpcode,
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SaveRestoreRegisterMaskOpcode, ReadWriteStaticRegisterOpcode, DebugLogOpcode,
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UnrecognizedInstruction>
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opcode{};
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};
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class DmntCheatVm {
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public:
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/// Helper Type for DmntCheatVm <=> yuzu Interface
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class Callbacks {
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public:
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virtual ~Callbacks();
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virtual void MemoryRead(VAddr address, void* data, u64 size) = 0;
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virtual void MemoryWrite(VAddr address, const void* data, u64 size) = 0;
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virtual u64 HidKeysDown() = 0;
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virtual void DebugLog(u8 id, u64 value) = 0;
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virtual void CommandLog(std::string_view data) = 0;
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};
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static constexpr std::size_t MaximumProgramOpcodeCount = 0x400;
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static constexpr std::size_t NumRegisters = 0x10;
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static constexpr std::size_t NumReadableStaticRegisters = 0x80;
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static constexpr std::size_t NumWritableStaticRegisters = 0x80;
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static constexpr std::size_t NumStaticRegisters =
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NumReadableStaticRegisters + NumWritableStaticRegisters;
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2021-05-16 07:46:30 +02:00
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explicit DmntCheatVm(std::unique_ptr<Callbacks> callbacks_);
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~DmntCheatVm();
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std::size_t GetProgramSize() const {
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return this->num_opcodes;
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}
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bool LoadProgram(const std::vector<CheatEntry>& cheats);
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void Execute(const CheatProcessMetadata& metadata);
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private:
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std::unique_ptr<Callbacks> callbacks;
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2019-09-22 00:13:10 +02:00
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std::size_t num_opcodes = 0;
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std::size_t instruction_ptr = 0;
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std::size_t condition_depth = 0;
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bool decode_success = false;
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std::array<u32, MaximumProgramOpcodeCount> program{};
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std::array<u64, NumRegisters> registers{};
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std::array<u64, NumRegisters> saved_values{};
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2020-07-15 01:19:22 +02:00
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std::array<u64, NumStaticRegisters> static_registers{};
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std::array<std::size_t, NumRegisters> loop_tops{};
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2019-05-31 01:34:02 +02:00
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bool DecodeNextOpcode(CheatVmOpcode& out);
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void SkipConditionalBlock();
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void ResetState();
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2019-09-22 00:13:10 +02:00
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// For implementing the DebugLog opcode.
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void DebugLog(u32 log_id, u64 value);
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void LogOpcode(const CheatVmOpcode& opcode);
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static u64 GetVmInt(VmInt value, u32 bit_width);
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static u64 GetCheatProcessAddress(const CheatProcessMetadata& metadata,
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MemoryAccessType mem_type, u64 rel_address);
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};
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2020-03-31 21:10:44 +02:00
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}; // namespace Core::Memory
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