2020-03-02 05:46:10 +01:00
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// Copyright 2020 yuzu emulator team
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <memory>
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#include <unordered_map>
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#include <dynarmic/A32/a32.h>
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#include <dynarmic/A64/a64.h>
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2020-06-19 01:56:59 +02:00
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#include <dynarmic/exclusive_monitor.h>
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2020-03-02 05:46:10 +01:00
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#include "common/common_types.h"
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#include "common/hash.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/exclusive_monitor.h"
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2020-03-31 21:10:44 +02:00
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namespace Core::Memory {
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2020-03-02 05:46:10 +01:00
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class Memory;
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}
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namespace Core {
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2020-02-25 03:04:12 +01:00
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class CPUInterruptHandler;
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2020-03-02 05:46:10 +01:00
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class DynarmicCallbacks32;
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class DynarmicCP15;
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2020-03-02 05:46:10 +01:00
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class DynarmicExclusiveMonitor;
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class System;
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class ARM_Dynarmic_32 final : public ARM_Interface {
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public:
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ARM_Dynarmic_32(System& system, CPUInterrupts& interrupt_handlers, bool uses_wall_clock,
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ExclusiveMonitor& exclusive_monitor, std::size_t core_index);
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2020-03-02 05:46:10 +01:00
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~ARM_Dynarmic_32() override;
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void SetPC(u64 pc) override;
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u64 GetPC() const override;
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2020-10-21 04:07:39 +02:00
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u64 GetReg(int index) const override;
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void SetReg(int index, u64 value) override;
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u128 GetVectorReg(int index) const override;
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void SetVectorReg(int index, u128 value) override;
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2020-03-02 05:46:10 +01:00
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u32 GetPSTATE() const override;
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void SetPSTATE(u32 pstate) override;
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void Run() override;
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2020-11-13 20:11:12 +01:00
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void ExceptionalExit() override;
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2020-03-02 05:46:10 +01:00
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void Step() override;
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VAddr GetTlsAddress() const override;
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void SetTlsAddress(VAddr address) override;
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void SetTPIDR_EL0(u64 value) override;
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u64 GetTPIDR_EL0() const override;
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2020-06-28 00:20:06 +02:00
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void ChangeProcessorID(std::size_t new_core_id) override;
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2020-03-02 05:46:10 +01:00
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2021-02-01 19:31:14 +01:00
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bool IsInThumbMode() const {
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return (GetPSTATE() & 0x20) != 0;
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}
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2020-03-02 05:46:10 +01:00
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void SaveContext(ThreadContext32& ctx) override;
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void SaveContext(ThreadContext64& ctx) override {}
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void LoadContext(const ThreadContext32& ctx) override;
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void LoadContext(const ThreadContext64& ctx) override {}
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void PrepareReschedule() override;
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void ClearExclusiveState() override;
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void ClearInstructionCache() override;
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2020-11-14 08:20:32 +01:00
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void InvalidateCacheRange(VAddr addr, std::size_t size) override;
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2020-03-02 05:46:10 +01:00
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void PageTableChanged(Common::PageTable& new_page_table,
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std::size_t new_address_space_size_in_bits) override;
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private:
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std::shared_ptr<Dynarmic::A32::Jit> MakeJit(Common::PageTable& page_table,
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std::size_t address_space_bits) const;
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using JitCacheKey = std::pair<Common::PageTable*, std::size_t>;
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using JitCacheType =
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std::unordered_map<JitCacheKey, std::shared_ptr<Dynarmic::A32::Jit>, Common::PairHash>;
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friend class DynarmicCallbacks32;
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2020-06-17 17:32:08 +02:00
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friend class DynarmicCP15;
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2020-03-02 05:46:10 +01:00
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std::unique_ptr<DynarmicCallbacks32> cb;
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JitCacheType jit_cache;
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std::shared_ptr<Dynarmic::A32::Jit> jit;
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2020-06-17 17:32:08 +02:00
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std::shared_ptr<DynarmicCP15> cp15;
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2020-03-02 05:46:10 +01:00
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std::size_t core_index;
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DynarmicExclusiveMonitor& exclusive_monitor;
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};
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} // namespace Core
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