255 lines
9.4 KiB
C++
255 lines
9.4 KiB
C++
// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <span>
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#include <tuple>
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#include <type_traits>
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#include <utility>
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#include <vector>
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#include "shader_recompiler/backend/spirv/emit_spirv.h"
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/function.h"
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#include "shader_recompiler/frontend/ir/microinstruction.h"
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#include "shader_recompiler/frontend/ir/program.h"
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namespace Shader::Backend::SPIRV {
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namespace {
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template <class Func>
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struct FuncTraits : FuncTraits<Func> {};
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template <class ReturnType_, class... Args>
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struct FuncTraits<ReturnType_ (*)(Args...)> {
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using ReturnType = ReturnType_;
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static constexpr size_t NUM_ARGS = sizeof...(Args);
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template <size_t I>
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using ArgType = std::tuple_element_t<I, std::tuple<Args...>>;
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};
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template <auto func, typename... Args>
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void SetDefinition(EmitContext& ctx, IR::Inst* inst, Args... args) {
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const Id forward_id{inst->Definition<Id>()};
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const bool has_forward_id{Sirit::ValidId(forward_id)};
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Id current_id{};
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if (has_forward_id) {
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current_id = ctx.ExchangeCurrentId(forward_id);
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}
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const Id new_id{func(ctx, std::forward<Args>(args)...)};
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if (has_forward_id) {
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ctx.ExchangeCurrentId(current_id);
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} else {
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inst->SetDefinition<Id>(new_id);
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}
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}
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template <typename ArgType>
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ArgType Arg(EmitContext& ctx, const IR::Value& arg) {
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if constexpr (std::is_same_v<ArgType, Id>) {
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return ctx.Def(arg);
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} else if constexpr (std::is_same_v<ArgType, const IR::Value&>) {
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return arg;
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} else if constexpr (std::is_same_v<ArgType, u32>) {
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return arg.U32();
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} else if constexpr (std::is_same_v<ArgType, IR::Block*>) {
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return arg.Label();
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}
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}
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template <auto func, bool is_first_arg_inst, size_t... I>
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void Invoke(EmitContext& ctx, IR::Inst* inst, std::index_sequence<I...>) {
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using Traits = FuncTraits<decltype(func)>;
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if constexpr (std::is_same_v<Traits::ReturnType, Id>) {
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if constexpr (is_first_arg_inst) {
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SetDefinition<func>(ctx, inst, inst, Arg<Traits::ArgType<I + 2>>(ctx, inst->Arg(I))...);
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} else {
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SetDefinition<func>(ctx, inst, Arg<Traits::ArgType<I + 1>>(ctx, inst->Arg(I))...);
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}
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} else {
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if constexpr (is_first_arg_inst) {
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func(ctx, inst, Arg<Traits::ArgType<I + 2>>(ctx, inst->Arg(I))...);
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} else {
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func(ctx, Arg<Traits::ArgType<I + 1>>(ctx, inst->Arg(I))...);
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}
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}
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}
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template <auto func>
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void Invoke(EmitContext& ctx, IR::Inst* inst) {
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using Traits = FuncTraits<decltype(func)>;
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static_assert(Traits::NUM_ARGS >= 1, "Insufficient arguments");
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if constexpr (Traits::NUM_ARGS == 1) {
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Invoke<func, false>(ctx, inst, std::make_index_sequence<0>{});
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} else {
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using FirstArgType = typename Traits::template ArgType<1>;
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static constexpr bool is_first_arg_inst = std::is_same_v<FirstArgType, IR::Inst*>;
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using Indices = std::make_index_sequence<Traits::NUM_ARGS - (is_first_arg_inst ? 2 : 1)>;
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Invoke<func, is_first_arg_inst>(ctx, inst, Indices{});
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}
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}
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void EmitInst(EmitContext& ctx, IR::Inst* inst) {
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switch (inst->Opcode()) {
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#define OPCODE(name, result_type, ...) \
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case IR::Opcode::name: \
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return Invoke<&Emit##name>(ctx, inst);
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#include "shader_recompiler/frontend/ir/opcodes.inc"
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#undef OPCODE
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}
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throw LogicError("Invalid opcode {}", inst->Opcode());
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}
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Id TypeId(const EmitContext& ctx, IR::Type type) {
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switch (type) {
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case IR::Type::U1:
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return ctx.U1;
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case IR::Type::U32:
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return ctx.U32[1];
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default:
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throw NotImplementedException("Phi node type {}", type);
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}
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}
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void SetupDenormControl(const Profile& profile, const IR::Program& program, EmitContext& ctx,
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Id main_func) {
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if (!profile.support_float_controls) {
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return;
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}
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const Info& info{program.info};
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if (!info.uses_fp32_denorms_flush && !info.uses_fp32_denorms_preserve &&
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!info.uses_fp16_denorms_flush && !info.uses_fp16_denorms_preserve) {
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return;
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}
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ctx.AddExtension("SPV_KHR_float_controls");
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if (info.uses_fp32_denorms_flush && info.uses_fp32_denorms_preserve) {
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// LOG_ERROR(HW_GPU, "Fp32 denorm flush and preserve on the same shader");
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} else if (info.uses_fp32_denorms_flush) {
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if (profile.support_fp32_denorm_flush) {
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ctx.AddCapability(spv::Capability::DenormFlushToZero);
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ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormFlushToZero, 32U);
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} else {
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// Drivers will most likely flush denorms by default, no need to warn
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}
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} else if (info.uses_fp32_denorms_preserve) {
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if (profile.support_fp32_denorm_preserve) {
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ctx.AddCapability(spv::Capability::DenormPreserve);
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ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormPreserve, 32U);
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} else {
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// LOG_WARNING(HW_GPU, "Fp32 denorm preserve used in shader without host support");
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}
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}
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if (!profile.support_separate_denorm_behavior) {
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// No separate denorm behavior
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return;
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}
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if (info.uses_fp16_denorms_flush && info.uses_fp16_denorms_preserve) {
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// LOG_ERROR(HW_GPU, "Fp16 denorm flush and preserve on the same shader");
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} else if (info.uses_fp16_denorms_flush) {
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if (profile.support_fp16_denorm_flush) {
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ctx.AddCapability(spv::Capability::DenormFlushToZero);
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ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormFlushToZero, 16U);
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} else {
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// Same as fp32, no need to warn as most drivers will flush by default
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}
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} else if (info.uses_fp16_denorms_preserve) {
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if (profile.support_fp16_denorm_preserve) {
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ctx.AddCapability(spv::Capability::DenormPreserve);
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ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormPreserve, 16U);
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} else {
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// LOG_WARNING(HW_GPU, "Fp16 denorm preserve used in shader without host support");
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}
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}
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}
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} // Anonymous namespace
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std::vector<u32> EmitSPIRV(const Profile& profile, Environment& env, IR::Program& program) {
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EmitContext ctx{profile, program};
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const Id void_function{ctx.TypeFunction(ctx.void_id)};
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// FIXME: Forward declare functions (needs sirit support)
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Id func{};
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for (IR::Function& function : program.functions) {
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func = ctx.OpFunction(ctx.void_id, spv::FunctionControlMask::MaskNone, void_function);
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for (IR::Block* const block : function.blocks) {
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ctx.AddLabel(block->Definition<Id>());
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for (IR::Inst& inst : block->Instructions()) {
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EmitInst(ctx, &inst);
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}
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}
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ctx.OpFunctionEnd();
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}
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boost::container::small_vector<Id, 32> interfaces;
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const Info& info{program.info};
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if (info.uses_workgroup_id) {
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interfaces.push_back(ctx.workgroup_id);
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}
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if (info.uses_local_invocation_id) {
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interfaces.push_back(ctx.local_invocation_id);
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}
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const std::span interfaces_span(interfaces.data(), interfaces.size());
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ctx.AddEntryPoint(spv::ExecutionModel::GLCompute, func, "main", interfaces_span);
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const std::array<u32, 3> workgroup_size{env.WorkgroupSize()};
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ctx.AddExecutionMode(func, spv::ExecutionMode::LocalSize, workgroup_size[0], workgroup_size[1],
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workgroup_size[2]);
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SetupDenormControl(profile, program, ctx, func);
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return ctx.Assemble();
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}
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Id EmitPhi(EmitContext& ctx, IR::Inst* inst) {
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const size_t num_args{inst->NumArgs()};
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boost::container::small_vector<Id, 32> operands;
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operands.reserve(num_args * 2);
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for (size_t index = 0; index < num_args; ++index) {
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// Phi nodes can have forward declarations, if an argument is not defined provide a forward
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// declaration of it. Invoke will take care of giving it the right definition when it's
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// actually defined.
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const IR::Value arg{inst->Arg(index)};
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Id def{};
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if (arg.IsImmediate()) {
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// Let the context handle immediate definitions, as it already knows how
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def = ctx.Def(arg);
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} else {
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IR::Inst* const arg_inst{arg.Inst()};
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def = arg_inst->Definition<Id>();
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if (!Sirit::ValidId(def)) {
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// If it hasn't been defined, get a forward declaration
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def = ctx.ForwardDeclarationId();
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arg_inst->SetDefinition<Id>(def);
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}
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}
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IR::Block* const phi_block{inst->PhiBlock(index)};
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operands.push_back(def);
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operands.push_back(phi_block->Definition<Id>());
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}
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const Id result_type{TypeId(ctx, inst->Arg(0).Type())};
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return ctx.OpPhi(result_type, std::span(operands.data(), operands.size()));
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}
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void EmitVoid(EmitContext&) {}
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Id EmitIdentity(EmitContext& ctx, const IR::Value& value) {
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return ctx.Def(value);
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}
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void EmitGetZeroFromOp(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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void EmitGetSignFromOp(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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void EmitGetCarryFromOp(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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void EmitGetOverflowFromOp(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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} // namespace Shader::Backend::SPIRV
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