Merge pull request #9112 from vonchenplus/deferred_draw
video_core: Reimplementing the maxwell drawing trigger mechanism
This commit is contained in:
liamwhite
GitHub
commit
fa913a702f
10 changed files with 203 additions and 232 deletions
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@ -117,10 +117,18 @@ void Maxwell3D::InitializeRegisterDefaults() {
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shadow_state = regs;
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mme_inline[MAXWELL3D_REG_INDEX(draw.end)] = true;
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mme_inline[MAXWELL3D_REG_INDEX(draw.begin)] = true;
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mme_inline[MAXWELL3D_REG_INDEX(vertex_buffer.count)] = true;
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mme_inline[MAXWELL3D_REG_INDEX(index_buffer.count)] = true;
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draw_command[MAXWELL3D_REG_INDEX(draw.end)] = true;
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draw_command[MAXWELL3D_REG_INDEX(draw.begin)] = true;
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draw_command[MAXWELL3D_REG_INDEX(vertex_buffer.first)] = true;
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draw_command[MAXWELL3D_REG_INDEX(vertex_buffer.count)] = true;
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draw_command[MAXWELL3D_REG_INDEX(index_buffer.first)] = true;
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draw_command[MAXWELL3D_REG_INDEX(index_buffer.count)] = true;
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draw_command[MAXWELL3D_REG_INDEX(index_buffer32_first)] = true;
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draw_command[MAXWELL3D_REG_INDEX(index_buffer16_first)] = true;
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draw_command[MAXWELL3D_REG_INDEX(index_buffer8_first)] = true;
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draw_command[MAXWELL3D_REG_INDEX(draw_inline_index)] = true;
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draw_command[MAXWELL3D_REG_INDEX(inline_index_2x16.even)] = true;
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draw_command[MAXWELL3D_REG_INDEX(inline_index_4x8.index0)] = true;
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}
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void Maxwell3D::ProcessMacro(u32 method, const u32* base_start, u32 amount, bool is_last_call) {
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@ -208,25 +216,6 @@ void Maxwell3D::ProcessMethodCall(u32 method, u32 argument, u32 nonshadow_argume
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return ProcessCBBind(3);
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case MAXWELL3D_REG_INDEX(bind_groups[4].raw_config):
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return ProcessCBBind(4);
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case MAXWELL3D_REG_INDEX(draw.end):
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return DrawArrays();
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case MAXWELL3D_REG_INDEX(index_buffer32_first):
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regs.index_buffer.count = regs.index_buffer32_first.count;
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regs.index_buffer.first = regs.index_buffer32_first.first;
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dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
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return DrawArrays();
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case MAXWELL3D_REG_INDEX(index_buffer16_first):
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regs.index_buffer.count = regs.index_buffer16_first.count;
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regs.index_buffer.first = regs.index_buffer16_first.first;
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dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
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return DrawArrays();
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case MAXWELL3D_REG_INDEX(index_buffer8_first):
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regs.index_buffer.count = regs.index_buffer8_first.count;
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regs.index_buffer.first = regs.index_buffer8_first.first;
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dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
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// a macro calls this one over and over, should it increase instancing?
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// Used by Hades and likely other Vulkan games.
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return DrawArrays();
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case MAXWELL3D_REG_INDEX(topology_override):
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use_topology_override = true;
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return;
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@ -261,14 +250,13 @@ void Maxwell3D::CallMacroMethod(u32 method, const std::vector<u32>& parameters)
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// Execute the current macro.
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macro_engine->Execute(macro_positions[entry], parameters);
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if (mme_draw.current_mode != MMEDrawMode::Undefined) {
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FlushMMEInlineDraw();
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}
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ProcessDeferredDraw();
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}
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void Maxwell3D::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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// It is an error to write to a register other than the current macro's ARG register before it
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// has finished execution.
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// It is an error to write to a register other than the current macro's ARG register before
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// it has finished execution.
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if (executing_macro != 0) {
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ASSERT(method == executing_macro + 1);
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}
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@ -283,9 +271,33 @@ void Maxwell3D::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid Maxwell3D register, increase the size of the Regs structure");
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const u32 argument = ProcessShadowRam(method, method_argument);
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ProcessDirtyRegisters(method, argument);
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ProcessMethodCall(method, argument, method_argument, is_last_call);
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if (draw_command[method]) {
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regs.reg_array[method] = method_argument;
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deferred_draw_method.push_back(method);
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auto u32_to_u8 = [&](const u32 argument) {
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inline_index_draw_indexes.push_back(static_cast<u8>(argument & 0x000000ff));
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inline_index_draw_indexes.push_back(static_cast<u8>((argument & 0x0000ff00) >> 8));
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inline_index_draw_indexes.push_back(static_cast<u8>((argument & 0x00ff0000) >> 16));
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inline_index_draw_indexes.push_back(static_cast<u8>((argument & 0xff000000) >> 24));
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};
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if (MAXWELL3D_REG_INDEX(draw_inline_index) == method) {
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u32_to_u8(method_argument);
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} else if (MAXWELL3D_REG_INDEX(inline_index_2x16.even) == method) {
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u32_to_u8(regs.inline_index_2x16.even);
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u32_to_u8(regs.inline_index_2x16.odd);
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} else if (MAXWELL3D_REG_INDEX(inline_index_4x8.index0) == method) {
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u32_to_u8(regs.inline_index_4x8.index0);
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u32_to_u8(regs.inline_index_4x8.index1);
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u32_to_u8(regs.inline_index_4x8.index2);
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u32_to_u8(regs.inline_index_4x8.index3);
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}
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} else {
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ProcessDeferredDraw();
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const u32 argument = ProcessShadowRam(method, method_argument);
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ProcessDirtyRegisters(method, argument);
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ProcessMethodCall(method, argument, method_argument, is_last_call);
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}
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}
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void Maxwell3D::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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@ -326,55 +338,6 @@ void Maxwell3D::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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}
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}
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void Maxwell3D::StepInstance(const MMEDrawMode expected_mode, const u32 count) {
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if (mme_draw.current_mode == MMEDrawMode::Undefined) {
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if (mme_draw.gl_begin_consume) {
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mme_draw.current_mode = expected_mode;
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mme_draw.current_count = count;
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mme_draw.instance_count = 1;
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mme_draw.gl_begin_consume = false;
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mme_draw.gl_end_count = 0;
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}
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return;
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} else {
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if (mme_draw.current_mode == expected_mode && count == mme_draw.current_count &&
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mme_draw.instance_mode && mme_draw.gl_begin_consume) {
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mme_draw.instance_count++;
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mme_draw.gl_begin_consume = false;
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return;
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} else {
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FlushMMEInlineDraw();
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}
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}
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// Tail call in case it needs to retry.
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StepInstance(expected_mode, count);
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}
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void Maxwell3D::CallMethodFromMME(u32 method, u32 method_argument) {
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if (mme_inline[method]) {
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regs.reg_array[method] = method_argument;
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if (method == MAXWELL3D_REG_INDEX(vertex_buffer.count) ||
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method == MAXWELL3D_REG_INDEX(index_buffer.count)) {
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const MMEDrawMode expected_mode = method == MAXWELL3D_REG_INDEX(vertex_buffer.count)
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? MMEDrawMode::Array
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: MMEDrawMode::Indexed;
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StepInstance(expected_mode, method_argument);
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} else if (method == MAXWELL3D_REG_INDEX(draw.begin)) {
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mme_draw.instance_mode =
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(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Subsequent) ||
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(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Unchanged);
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mme_draw.gl_begin_consume = true;
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} else {
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mme_draw.gl_end_count++;
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}
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} else {
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if (mme_draw.current_mode != MMEDrawMode::Undefined) {
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FlushMMEInlineDraw();
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}
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CallMethod(method, method_argument, true);
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}
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}
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void Maxwell3D::ProcessTopologyOverride() {
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using PrimitiveTopology = Maxwell3D::Regs::PrimitiveTopology;
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using PrimitiveTopologyOverride = Maxwell3D::Regs::PrimitiveTopologyOverride;
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@ -404,41 +367,6 @@ void Maxwell3D::ProcessTopologyOverride() {
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}
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}
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void Maxwell3D::FlushMMEInlineDraw() {
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LOG_TRACE(HW_GPU, "called, topology={}, count={}", regs.draw.topology.Value(),
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regs.vertex_buffer.count);
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ASSERT_MSG(!(regs.index_buffer.count && regs.vertex_buffer.count), "Both indexed and direct?");
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ASSERT(mme_draw.instance_count == mme_draw.gl_end_count);
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// Both instance configuration registers can not be set at the same time.
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ASSERT_MSG(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::First ||
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regs.draw.instance_id != Maxwell3D::Regs::Draw::InstanceId::Unchanged,
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"Illegal combination of instancing parameters");
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ProcessTopologyOverride();
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const bool is_indexed = mme_draw.current_mode == MMEDrawMode::Indexed;
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if (ShouldExecute()) {
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rasterizer->Draw(is_indexed, true);
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}
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// TODO(bunnei): Below, we reset vertex count so that we can use these registers to determine if
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// the game is trying to draw indexed or direct mode. This needs to be verified on HW still -
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// it's possible that it is incorrect and that there is some other register used to specify the
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// drawing mode.
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if (is_indexed) {
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regs.index_buffer.count = 0;
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} else {
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regs.vertex_buffer.count = 0;
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}
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mme_draw.current_mode = MMEDrawMode::Undefined;
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mme_draw.current_count = 0;
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mme_draw.instance_count = 0;
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mme_draw.instance_mode = false;
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mme_draw.gl_begin_consume = false;
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mme_draw.gl_end_count = 0;
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}
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void Maxwell3D::ProcessMacroUpload(u32 data) {
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macro_engine->AddCode(regs.load_mme.instruction_ptr++, data);
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}
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@ -573,42 +501,6 @@ void Maxwell3D::ProcessSyncPoint() {
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rasterizer->SignalSyncPoint(sync_point);
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}
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void Maxwell3D::DrawArrays() {
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LOG_TRACE(HW_GPU, "called, topology={}, count={}", regs.draw.topology.Value(),
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regs.vertex_buffer.count);
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ASSERT_MSG(!(regs.index_buffer.count && regs.vertex_buffer.count), "Both indexed and direct?");
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// Both instance configuration registers can not be set at the same time.
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ASSERT_MSG(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::First ||
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regs.draw.instance_id != Maxwell3D::Regs::Draw::InstanceId::Unchanged,
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"Illegal combination of instancing parameters");
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ProcessTopologyOverride();
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if (regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Subsequent) {
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// Increment the current instance *before* drawing.
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state.current_instance++;
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} else if (regs.draw.instance_id != Maxwell3D::Regs::Draw::InstanceId::Unchanged) {
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// Reset the current instance to 0.
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state.current_instance = 0;
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}
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const bool is_indexed{regs.index_buffer.count && !regs.vertex_buffer.count};
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if (ShouldExecute()) {
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rasterizer->Draw(is_indexed, false);
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}
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// TODO(bunnei): Below, we reset vertex count so that we can use these registers to determine if
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// the game is trying to draw indexed or direct mode. This needs to be verified on HW still -
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// it's possible that it is incorrect and that there is some other register used to specify the
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// drawing mode.
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if (is_indexed) {
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regs.index_buffer.count = 0;
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} else {
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regs.vertex_buffer.count = 0;
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}
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}
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std::optional<u64> Maxwell3D::GetQueryResult() {
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switch (regs.report_semaphore.query.report) {
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case Regs::ReportSemaphore::Report::Payload:
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@ -691,4 +583,95 @@ void Maxwell3D::ProcessClearBuffers() {
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rasterizer->Clear();
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}
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void Maxwell3D::ProcessDeferredDraw() {
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if (deferred_draw_method.empty()) {
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return;
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}
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enum class DrawMode {
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Undefined,
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General,
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Instance,
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};
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DrawMode draw_mode{DrawMode::Undefined};
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u32 instance_count = 1;
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auto first_method = deferred_draw_method[0];
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if (MAXWELL3D_REG_INDEX(draw.begin) == first_method) {
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// The minimum number of methods for drawing must be greater than or equal to
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// 3[draw.begin->vertex(index)count->draw.end] to avoid errors in index mode drawing
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if (deferred_draw_method.size() < 3) {
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return;
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}
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draw_mode = (regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Subsequent) ||
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(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Unchanged)
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? DrawMode::Instance
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: DrawMode::General;
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} else if (MAXWELL3D_REG_INDEX(index_buffer32_first) == first_method ||
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MAXWELL3D_REG_INDEX(index_buffer16_first) == first_method ||
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MAXWELL3D_REG_INDEX(index_buffer8_first) == first_method) {
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draw_mode = DrawMode::General;
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}
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// Drawing will only begin with draw.begin or index_buffer method, other methods directly
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// clear
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if (draw_mode == DrawMode::Undefined) {
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deferred_draw_method.clear();
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return;
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}
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if (draw_mode == DrawMode::Instance) {
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ASSERT_MSG(deferred_draw_method.size() % 4 == 0, "Instance mode method size error");
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instance_count = static_cast<u32>(deferred_draw_method.size()) / 4;
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} else {
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if (MAXWELL3D_REG_INDEX(index_buffer32_first) == first_method) {
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regs.index_buffer.count = regs.index_buffer32_first.count;
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regs.index_buffer.first = regs.index_buffer32_first.first;
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dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
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} else if (MAXWELL3D_REG_INDEX(index_buffer32_first) == first_method) {
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regs.index_buffer.count = regs.index_buffer16_first.count;
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regs.index_buffer.first = regs.index_buffer16_first.first;
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dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
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} else if (MAXWELL3D_REG_INDEX(index_buffer32_first) == first_method) {
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regs.index_buffer.count = regs.index_buffer8_first.count;
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regs.index_buffer.first = regs.index_buffer8_first.first;
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dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
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} else {
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auto second_method = deferred_draw_method[1];
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if (MAXWELL3D_REG_INDEX(draw_inline_index) == second_method ||
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MAXWELL3D_REG_INDEX(inline_index_2x16.even) == second_method ||
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MAXWELL3D_REG_INDEX(inline_index_4x8.index0) == second_method) {
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regs.index_buffer.count = static_cast<u32>(inline_index_draw_indexes.size() / 4);
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regs.index_buffer.format = Regs::IndexFormat::UnsignedInt;
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}
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}
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}
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LOG_TRACE(HW_GPU, "called, topology={}, count={}", regs.draw.topology.Value(),
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regs.vertex_buffer.count);
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ASSERT_MSG(!(regs.index_buffer.count && regs.vertex_buffer.count), "Both indexed and direct?");
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// Both instance configuration registers can not be set at the same time.
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ASSERT_MSG(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::First ||
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regs.draw.instance_id != Maxwell3D::Regs::Draw::InstanceId::Unchanged,
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"Illegal combination of instancing parameters");
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ProcessTopologyOverride();
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const bool is_indexed = regs.index_buffer.count && !regs.vertex_buffer.count;
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if (ShouldExecute()) {
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rasterizer->Draw(is_indexed, instance_count);
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}
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if (is_indexed) {
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regs.index_buffer.count = 0;
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} else {
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regs.vertex_buffer.count = 0;
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}
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deferred_draw_method.clear();
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inline_index_draw_indexes.clear();
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}
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} // namespace Tegra::Engines
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@ -1739,14 +1739,11 @@ public:
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Footprint_1x1_Virtual = 2,
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};
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struct InlineIndex4x8Align {
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struct InlineIndex4x8 {
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union {
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BitField<0, 30, u32> count;
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BitField<30, 2, u32> start;
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};
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};
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struct InlineIndex4x8Index {
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union {
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BitField<0, 8, u32> index0;
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BitField<8, 8, u32> index1;
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@ -2836,8 +2833,7 @@ public:
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u32 depth_write_enabled; ///< 0x12E8
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u32 alpha_test_enabled; ///< 0x12EC
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INSERT_PADDING_BYTES_NOINIT(0x10);
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InlineIndex4x8Align inline_index_4x8_align; ///< 0x1300
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InlineIndex4x8Index inline_index_4x8_index; ///< 0x1304
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InlineIndex4x8 inline_index_4x8; ///< 0x1300
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D3DCullMode d3d_cull_mode; ///< 0x1308
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ComparisonOp depth_test_func; ///< 0x130C
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f32 alpha_test_ref; ///< 0x1310
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@ -3048,8 +3044,6 @@ public:
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};
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std::array<ShaderStageInfo, Regs::MaxShaderStage> shader_stages;
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u32 current_instance = 0; ///< Current instance to be used to simulate instanced rendering.
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};
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State state{};
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@ -3064,11 +3058,6 @@ public:
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void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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u32 methods_pending) override;
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/// Write the value to the register identified by method.
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void CallMethodFromMME(u32 method, u32 method_argument);
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void FlushMMEInlineDraw();
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bool ShouldExecute() const {
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return execute_on;
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}
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|
|
@ -3081,21 +3070,6 @@ public:
|
|||
return *rasterizer;
|
||||
}
|
||||
|
||||
enum class MMEDrawMode : u32 {
|
||||
Undefined,
|
||||
Array,
|
||||
Indexed,
|
||||
};
|
||||
|
||||
struct MMEDrawState {
|
||||
MMEDrawMode current_mode{MMEDrawMode::Undefined};
|
||||
u32 current_count{};
|
||||
u32 instance_count{};
|
||||
bool instance_mode{};
|
||||
bool gl_begin_consume{};
|
||||
u32 gl_end_count{};
|
||||
} mme_draw;
|
||||
|
||||
struct DirtyState {
|
||||
using Flags = std::bitset<std::numeric_limits<u8>::max()>;
|
||||
using Table = std::array<u8, Regs::NUM_REGS>;
|
||||
|
|
@ -3105,6 +3079,8 @@ public:
|
|||
Tables tables{};
|
||||
} dirty;
|
||||
|
||||
std::vector<u8> inline_index_draw_indexes;
|
||||
|
||||
private:
|
||||
void InitializeRegisterDefaults();
|
||||
|
||||
|
|
@ -3164,14 +3140,10 @@ private:
|
|||
/// Handles a write to the CB_BIND register.
|
||||
void ProcessCBBind(size_t stage_index);
|
||||
|
||||
/// Handles a write to the VERTEX_END_GL register, triggering a draw.
|
||||
void DrawArrays();
|
||||
|
||||
/// Handles use of topology overrides (e.g., to avoid using a topology assigned from a macro)
|
||||
void ProcessTopologyOverride();
|
||||
|
||||
// Handles a instance drawcall from MME
|
||||
void StepInstance(MMEDrawMode expected_mode, u32 count);
|
||||
void ProcessDeferredDraw();
|
||||
|
||||
/// Returns a query's value or an empty object if the value will be deferred through a cache.
|
||||
std::optional<u64> GetQueryResult();
|
||||
|
|
@ -3184,8 +3156,6 @@ private:
|
|||
/// Start offsets of each macro in macro_memory
|
||||
std::array<u32, 0x80> macro_positions{};
|
||||
|
||||
std::array<bool, Regs::NUM_REGS> mme_inline{};
|
||||
|
||||
/// Macro method that is currently being executed / being fed parameters.
|
||||
u32 executing_macro = 0;
|
||||
/// Parameters that have been submitted to the macro call so far.
|
||||
|
|
@ -3198,6 +3168,9 @@ private:
|
|||
|
||||
bool execute_on{true};
|
||||
bool use_topology_override{false};
|
||||
|
||||
std::array<bool, Regs::NUM_REGS> draw_command{};
|
||||
std::vector<u32> deferred_draw_method;
|
||||
};
|
||||
|
||||
#define ASSERT_REG_POSITION(field_name, position) \
|
||||
|
|
@ -3402,8 +3375,7 @@ ASSERT_REG_POSITION(alpha_to_coverage_dither, 0x12E0);
|
|||
ASSERT_REG_POSITION(blend_per_target_enabled, 0x12E4);
|
||||
ASSERT_REG_POSITION(depth_write_enabled, 0x12E8);
|
||||
ASSERT_REG_POSITION(alpha_test_enabled, 0x12EC);
|
||||
ASSERT_REG_POSITION(inline_index_4x8_align, 0x1300);
|
||||
ASSERT_REG_POSITION(inline_index_4x8_index, 0x1304);
|
||||
ASSERT_REG_POSITION(inline_index_4x8, 0x1300);
|
||||
ASSERT_REG_POSITION(d3d_cull_mode, 0x1308);
|
||||
ASSERT_REG_POSITION(depth_test_func, 0x130C);
|
||||
ASSERT_REG_POSITION(alpha_test_ref, 0x1310);
|
||||
|
|
|
|||
|
|
@ -22,35 +22,29 @@ void HLE_771BB18C62444DA0(Engines::Maxwell3D& maxwell3d, const std::vector<u32>&
|
|||
maxwell3d.regs.draw.topology.Assign(
|
||||
static_cast<Tegra::Engines::Maxwell3D::Regs::PrimitiveTopology>(parameters[0] & 0x3ffffff));
|
||||
maxwell3d.regs.global_base_instance_index = parameters[5];
|
||||
maxwell3d.mme_draw.instance_count = instance_count;
|
||||
maxwell3d.regs.global_base_vertex_index = parameters[3];
|
||||
maxwell3d.regs.index_buffer.count = parameters[1];
|
||||
maxwell3d.regs.index_buffer.first = parameters[4];
|
||||
|
||||
if (maxwell3d.ShouldExecute()) {
|
||||
maxwell3d.Rasterizer().Draw(true, true);
|
||||
maxwell3d.Rasterizer().Draw(true, instance_count);
|
||||
}
|
||||
maxwell3d.regs.index_buffer.count = 0;
|
||||
maxwell3d.mme_draw.instance_count = 0;
|
||||
maxwell3d.mme_draw.current_mode = Engines::Maxwell3D::MMEDrawMode::Undefined;
|
||||
}
|
||||
|
||||
void HLE_0D61FC9FAAC9FCAD(Engines::Maxwell3D& maxwell3d, const std::vector<u32>& parameters) {
|
||||
const u32 count = (maxwell3d.GetRegisterValue(0xD1B) & parameters[2]);
|
||||
const u32 instance_count = (maxwell3d.GetRegisterValue(0xD1B) & parameters[2]);
|
||||
|
||||
maxwell3d.regs.vertex_buffer.first = parameters[3];
|
||||
maxwell3d.regs.vertex_buffer.count = parameters[1];
|
||||
maxwell3d.regs.global_base_instance_index = parameters[4];
|
||||
maxwell3d.regs.draw.topology.Assign(
|
||||
static_cast<Tegra::Engines::Maxwell3D::Regs::PrimitiveTopology>(parameters[0]));
|
||||
maxwell3d.mme_draw.instance_count = count;
|
||||
|
||||
if (maxwell3d.ShouldExecute()) {
|
||||
maxwell3d.Rasterizer().Draw(false, true);
|
||||
maxwell3d.Rasterizer().Draw(false, instance_count);
|
||||
}
|
||||
maxwell3d.regs.vertex_buffer.count = 0;
|
||||
maxwell3d.mme_draw.instance_count = 0;
|
||||
maxwell3d.mme_draw.current_mode = Engines::Maxwell3D::MMEDrawMode::Undefined;
|
||||
}
|
||||
|
||||
void HLE_0217920100488FF7(Engines::Maxwell3D& maxwell3d, const std::vector<u32>& parameters) {
|
||||
|
|
@ -63,24 +57,21 @@ void HLE_0217920100488FF7(Engines::Maxwell3D& maxwell3d, const std::vector<u32>&
|
|||
maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
|
||||
maxwell3d.regs.global_base_vertex_index = element_base;
|
||||
maxwell3d.regs.global_base_instance_index = base_instance;
|
||||
maxwell3d.mme_draw.instance_count = instance_count;
|
||||
maxwell3d.CallMethodFromMME(0x8e3, 0x640);
|
||||
maxwell3d.CallMethodFromMME(0x8e4, element_base);
|
||||
maxwell3d.CallMethodFromMME(0x8e5, base_instance);
|
||||
maxwell3d.CallMethod(0x8e3, 0x640, true);
|
||||
maxwell3d.CallMethod(0x8e4, element_base, true);
|
||||
maxwell3d.CallMethod(0x8e5, base_instance, true);
|
||||
maxwell3d.regs.draw.topology.Assign(
|
||||
static_cast<Tegra::Engines::Maxwell3D::Regs::PrimitiveTopology>(parameters[0]));
|
||||
if (maxwell3d.ShouldExecute()) {
|
||||
maxwell3d.Rasterizer().Draw(true, true);
|
||||
maxwell3d.Rasterizer().Draw(true, instance_count);
|
||||
}
|
||||
maxwell3d.regs.vertex_id_base = 0x0;
|
||||
maxwell3d.regs.index_buffer.count = 0;
|
||||
maxwell3d.regs.global_base_vertex_index = 0x0;
|
||||
maxwell3d.regs.global_base_instance_index = 0x0;
|
||||
maxwell3d.mme_draw.instance_count = 0;
|
||||
maxwell3d.CallMethodFromMME(0x8e3, 0x640);
|
||||
maxwell3d.CallMethodFromMME(0x8e4, 0x0);
|
||||
maxwell3d.CallMethodFromMME(0x8e5, 0x0);
|
||||
maxwell3d.mme_draw.current_mode = Engines::Maxwell3D::MMEDrawMode::Undefined;
|
||||
maxwell3d.CallMethod(0x8e3, 0x640, true);
|
||||
maxwell3d.CallMethod(0x8e4, 0x0, true);
|
||||
maxwell3d.CallMethod(0x8e5, 0x0, true);
|
||||
}
|
||||
|
||||
// Multidraw Indirect
|
||||
|
|
@ -91,11 +82,9 @@ void HLE_3F5E74B9C9A50164(Engines::Maxwell3D& maxwell3d, const std::vector<u32>&
|
|||
maxwell3d.regs.index_buffer.count = 0;
|
||||
maxwell3d.regs.global_base_vertex_index = 0x0;
|
||||
maxwell3d.regs.global_base_instance_index = 0x0;
|
||||
maxwell3d.mme_draw.instance_count = 0;
|
||||
maxwell3d.CallMethodFromMME(0x8e3, 0x640);
|
||||
maxwell3d.CallMethodFromMME(0x8e4, 0x0);
|
||||
maxwell3d.CallMethodFromMME(0x8e5, 0x0);
|
||||
maxwell3d.mme_draw.current_mode = Engines::Maxwell3D::MMEDrawMode::Undefined;
|
||||
maxwell3d.CallMethod(0x8e3, 0x640, true);
|
||||
maxwell3d.CallMethod(0x8e4, 0x0, true);
|
||||
maxwell3d.CallMethod(0x8e5, 0x0, true);
|
||||
maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
|
||||
});
|
||||
const u32 start_indirect = parameters[0];
|
||||
|
|
@ -127,15 +116,13 @@ void HLE_3F5E74B9C9A50164(Engines::Maxwell3D& maxwell3d, const std::vector<u32>&
|
|||
maxwell3d.regs.index_buffer.count = num_vertices;
|
||||
maxwell3d.regs.global_base_vertex_index = base_vertex;
|
||||
maxwell3d.regs.global_base_instance_index = base_instance;
|
||||
maxwell3d.mme_draw.instance_count = instance_count;
|
||||
maxwell3d.CallMethodFromMME(0x8e3, 0x640);
|
||||
maxwell3d.CallMethodFromMME(0x8e4, base_vertex);
|
||||
maxwell3d.CallMethodFromMME(0x8e5, base_instance);
|
||||
maxwell3d.CallMethod(0x8e3, 0x640, true);
|
||||
maxwell3d.CallMethod(0x8e4, base_vertex, true);
|
||||
maxwell3d.CallMethod(0x8e5, base_instance, true);
|
||||
maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
|
||||
if (maxwell3d.ShouldExecute()) {
|
||||
maxwell3d.Rasterizer().Draw(true, true);
|
||||
maxwell3d.Rasterizer().Draw(true, instance_count);
|
||||
}
|
||||
maxwell3d.mme_draw.current_mode = Engines::Maxwell3D::MMEDrawMode::Undefined;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -335,7 +335,7 @@ void MacroInterpreterImpl::SetMethodAddress(u32 address) {
|
|||
}
|
||||
|
||||
void MacroInterpreterImpl::Send(u32 value) {
|
||||
maxwell3d.CallMethodFromMME(method_address.address, value);
|
||||
maxwell3d.CallMethod(method_address.address, value, true);
|
||||
// Increment the method address by the method increment.
|
||||
method_address.address.Assign(method_address.address.Value() +
|
||||
method_address.increment.Value());
|
||||
|
|
|
|||
|
|
@ -346,7 +346,7 @@ void MacroJITx64Impl::Compile_Read(Macro::Opcode opcode) {
|
|||
}
|
||||
|
||||
void Send(Engines::Maxwell3D* maxwell3d, Macro::MethodAddress method_address, u32 value) {
|
||||
maxwell3d->CallMethodFromMME(method_address.address, value);
|
||||
maxwell3d->CallMethod(method_address.address, value, true);
|
||||
}
|
||||
|
||||
void MacroJITx64Impl::Compile_Send(Xbyak::Reg32 value) {
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@ public:
|
|||
virtual ~RasterizerInterface() = default;
|
||||
|
||||
/// Dispatches a draw invocation
|
||||
virtual void Draw(bool is_indexed, bool is_instanced) = 0;
|
||||
virtual void Draw(bool is_indexed, u32 instance_count) = 0;
|
||||
|
||||
/// Clear the current framebuffer
|
||||
virtual void Clear() = 0;
|
||||
|
|
|
|||
|
|
@ -205,7 +205,7 @@ void RasterizerOpenGL::Clear() {
|
|||
++num_queued_commands;
|
||||
}
|
||||
|
||||
void RasterizerOpenGL::Draw(bool is_indexed, bool is_instanced) {
|
||||
void RasterizerOpenGL::Draw(bool is_indexed, u32 instance_count) {
|
||||
MICROPROFILE_SCOPE(OpenGL_Drawing);
|
||||
|
||||
SCOPE_EXIT({ gpu.TickWork(); });
|
||||
|
|
@ -222,14 +222,15 @@ void RasterizerOpenGL::Draw(bool is_indexed, bool is_instanced) {
|
|||
pipeline->SetEngine(maxwell3d, gpu_memory);
|
||||
pipeline->Configure(is_indexed);
|
||||
|
||||
BindInlineIndexBuffer();
|
||||
|
||||
SyncState();
|
||||
|
||||
const GLenum primitive_mode = MaxwellToGL::PrimitiveTopology(maxwell3d->regs.draw.topology);
|
||||
BeginTransformFeedback(pipeline, primitive_mode);
|
||||
|
||||
const GLuint base_instance = static_cast<GLuint>(maxwell3d->regs.global_base_instance_index);
|
||||
const GLsizei num_instances =
|
||||
static_cast<GLsizei>(is_instanced ? maxwell3d->mme_draw.instance_count : 1);
|
||||
const GLsizei num_instances = static_cast<GLsizei>(instance_count);
|
||||
if (is_indexed) {
|
||||
const GLint base_vertex = static_cast<GLint>(maxwell3d->regs.global_base_vertex_index);
|
||||
const GLsizei num_vertices = static_cast<GLsizei>(maxwell3d->regs.index_buffer.count);
|
||||
|
|
@ -1129,6 +1130,16 @@ void RasterizerOpenGL::ReleaseChannel(s32 channel_id) {
|
|||
query_cache.EraseChannel(channel_id);
|
||||
}
|
||||
|
||||
void RasterizerOpenGL::BindInlineIndexBuffer() {
|
||||
if (maxwell3d->inline_index_draw_indexes.empty()) {
|
||||
return;
|
||||
}
|
||||
const auto data_count = static_cast<u32>(maxwell3d->inline_index_draw_indexes.size());
|
||||
auto buffer = Buffer(buffer_cache_runtime, *this, 0, data_count);
|
||||
buffer.ImmediateUpload(0, maxwell3d->inline_index_draw_indexes);
|
||||
buffer_cache_runtime.BindIndexBuffer(buffer, 0, data_count);
|
||||
}
|
||||
|
||||
AccelerateDMA::AccelerateDMA(BufferCache& buffer_cache_) : buffer_cache{buffer_cache_} {}
|
||||
|
||||
bool AccelerateDMA::BufferCopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) {
|
||||
|
|
|
|||
|
|
@ -68,7 +68,7 @@ public:
|
|||
StateTracker& state_tracker_);
|
||||
~RasterizerOpenGL() override;
|
||||
|
||||
void Draw(bool is_indexed, bool is_instanced) override;
|
||||
void Draw(bool is_indexed, u32 instance_count) override;
|
||||
void Clear() override;
|
||||
void DispatchCompute() override;
|
||||
void ResetCounter(VideoCore::QueryType type) override;
|
||||
|
|
@ -199,6 +199,8 @@ private:
|
|||
/// End a transform feedback
|
||||
void EndTransformFeedback();
|
||||
|
||||
void BindInlineIndexBuffer();
|
||||
|
||||
Tegra::GPU& gpu;
|
||||
|
||||
const Device& device;
|
||||
|
|
|
|||
|
|
@ -127,11 +127,10 @@ VkRect2D GetScissorState(const Maxwell& regs, size_t index, u32 up_scale = 1, u3
|
|||
return scissor;
|
||||
}
|
||||
|
||||
DrawParams MakeDrawParams(const Maxwell& regs, u32 num_instances, bool is_instanced,
|
||||
bool is_indexed) {
|
||||
DrawParams MakeDrawParams(const Maxwell& regs, u32 num_instances, bool is_indexed) {
|
||||
DrawParams params{
|
||||
.base_instance = regs.global_base_instance_index,
|
||||
.num_instances = is_instanced ? num_instances : 1,
|
||||
.num_instances = num_instances,
|
||||
.base_vertex = is_indexed ? regs.global_base_vertex_index : regs.vertex_buffer.first,
|
||||
.num_vertices = is_indexed ? regs.index_buffer.count : regs.vertex_buffer.count,
|
||||
.first_index = is_indexed ? regs.index_buffer.first : 0,
|
||||
|
|
@ -177,7 +176,7 @@ RasterizerVulkan::RasterizerVulkan(Core::Frontend::EmuWindow& emu_window_, Tegra
|
|||
|
||||
RasterizerVulkan::~RasterizerVulkan() = default;
|
||||
|
||||
void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
|
||||
void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) {
|
||||
MICROPROFILE_SCOPE(Vulkan_Drawing);
|
||||
|
||||
SCOPE_EXIT({ gpu.TickWork(); });
|
||||
|
|
@ -194,13 +193,15 @@ void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
|
|||
pipeline->SetEngine(maxwell3d, gpu_memory);
|
||||
pipeline->Configure(is_indexed);
|
||||
|
||||
BindInlineIndexBuffer();
|
||||
|
||||
BeginTransformFeedback();
|
||||
|
||||
UpdateDynamicStates();
|
||||
|
||||
const auto& regs{maxwell3d->regs};
|
||||
const u32 num_instances{maxwell3d->mme_draw.instance_count};
|
||||
const DrawParams draw_params{MakeDrawParams(regs, num_instances, is_instanced, is_indexed)};
|
||||
const u32 num_instances{instance_count};
|
||||
const DrawParams draw_params{MakeDrawParams(regs, num_instances, is_indexed)};
|
||||
scheduler.Record([draw_params](vk::CommandBuffer cmdbuf) {
|
||||
if (draw_params.is_indexed) {
|
||||
cmdbuf.DrawIndexed(draw_params.num_vertices, draw_params.num_instances,
|
||||
|
|
@ -1009,4 +1010,17 @@ void RasterizerVulkan::ReleaseChannel(s32 channel_id) {
|
|||
query_cache.EraseChannel(channel_id);
|
||||
}
|
||||
|
||||
void RasterizerVulkan::BindInlineIndexBuffer() {
|
||||
if (maxwell3d->inline_index_draw_indexes.empty()) {
|
||||
return;
|
||||
}
|
||||
const auto data_count = static_cast<u32>(maxwell3d->inline_index_draw_indexes.size());
|
||||
auto buffer = buffer_cache_runtime.UploadStagingBuffer(data_count);
|
||||
std::memcpy(buffer.mapped_span.data(), maxwell3d->inline_index_draw_indexes.data(), data_count);
|
||||
buffer_cache_runtime.BindIndexBuffer(
|
||||
maxwell3d->regs.draw.topology, maxwell3d->regs.index_buffer.format,
|
||||
maxwell3d->regs.index_buffer.first, maxwell3d->regs.index_buffer.count, buffer.buffer,
|
||||
static_cast<u32>(buffer.offset), data_count);
|
||||
}
|
||||
|
||||
} // namespace Vulkan
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ public:
|
|||
StateTracker& state_tracker_, Scheduler& scheduler_);
|
||||
~RasterizerVulkan() override;
|
||||
|
||||
void Draw(bool is_indexed, bool is_instanced) override;
|
||||
void Draw(bool is_indexed, u32 instance_count) override;
|
||||
void Clear() override;
|
||||
void DispatchCompute() override;
|
||||
void ResetCounter(VideoCore::QueryType type) override;
|
||||
|
|
@ -141,6 +141,8 @@ private:
|
|||
|
||||
void UpdateVertexInput(Tegra::Engines::Maxwell3D::Regs& regs);
|
||||
|
||||
void BindInlineIndexBuffer();
|
||||
|
||||
Tegra::GPU& gpu;
|
||||
|
||||
ScreenInfo& screen_info;
|
||||
|
|
|
|||
Loading…
Reference in a new issue