Exverge/suyu
3
0
Fork 0
forked from suyu/suyu
Code Pull requests Activity

Dyncom: Use size_t instead of int to store the instruction offsets in the instruction cache.

Browse source 
Fixes a few warnings.
This commit is contained in:
Subv 2017-08-19 11:30:20 -05:00
parent d3fb1d6c38
commit 9d0841b48b
2 changed files with 4 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/core/arm/dyncom/arm_dyncom_interpreter.cpp
View file

@ -838,7 +838,7 @@ static unsigned int InterpreterTranslateInstruction(const ARMul_State* cpu, cons
return inst_size;
}
static int InterpreterTranslateBlock(ARMul_State* cpu, int& bb_start, u32 addr) {
static int InterpreterTranslateBlock(ARMul_State* cpu, std::size_t& bb_start, u32 addr) {
MICROPROFILE_SCOPE(DynCom_Decode);
// Decode instruction, get index
@ -871,7 +871,7 @@ static int InterpreterTranslateBlock(ARMul_State* cpu, int& bb_start, u32 addr)
return KEEP_GOING;
}
static int InterpreterTranslateSingle(ARMul_State* cpu, int& bb_start, u32 addr) {
static int InterpreterTranslateSingle(ARMul_State* cpu, std::size_t& bb_start, u32 addr) {
MICROPROFILE_SCOPE(DynCom_Decode);
ARM_INST_PTR inst_base = nullptr;
@ -1620,7 +1620,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
unsigned int addr;
unsigned int num_instrs = 0;
int ptr;
std::size_t ptr;
LOAD_NZCVT;
DISPATCH : {

2
src/core/arm/skyeye_common/armstate.h
View file

@ -230,7 +230,7 @@ public:
// TODO(bunnei): Move this cache to a better place - it should be per codeset (likely per
// process for our purposes), not per ARMul_State (which tracks CPU core state).
std::unordered_map<u32, int> instruction_cache;
std::unordered_map<u32, std::size_t> instruction_cache;
private:
void ResetMPCoreCP15Registers();