33 lines
1.3 KiB
Diff
33 lines
1.3 KiB
Diff
diff --git a/lib/Target/Mips/MipsFastISel.cpp b/lib/Target/Mips/MipsFastISel.cpp
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index f79cb0e6..c6279046 100644
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--- a/lib/Target/Mips/MipsFastISel.cpp
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+++ b/lib/Target/Mips/MipsFastISel.cpp
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@@ -70,6 +70,7 @@
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#include <cassert>
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#include <cstdint>
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#include <new>
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+#include <array>
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#define DEBUG_TYPE "mips-fastisel"
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@@ -1309,13 +1310,13 @@ bool MipsFastISel::fastLowerArguments() {
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return false;
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}
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- const ArrayRef<MCPhysReg> GPR32ArgRegs = {Mips::A0, Mips::A1, Mips::A2,
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- Mips::A3};
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- const ArrayRef<MCPhysReg> FGR32ArgRegs = {Mips::F12, Mips::F14};
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- const ArrayRef<MCPhysReg> AFGR64ArgRegs = {Mips::D6, Mips::D7};
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- ArrayRef<MCPhysReg>::iterator NextGPR32 = GPR32ArgRegs.begin();
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- ArrayRef<MCPhysReg>::iterator NextFGR32 = FGR32ArgRegs.begin();
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- ArrayRef<MCPhysReg>::iterator NextAFGR64 = AFGR64ArgRegs.begin();
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+ std::array<MCPhysReg, 4> GPR32ArgRegs = {{Mips::A0, Mips::A1, Mips::A2,
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+ Mips::A3}};
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+ std::array<MCPhysReg, 2> FGR32ArgRegs = {{Mips::F12, Mips::F14}};
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+ std::array<MCPhysReg, 2> AFGR64ArgRegs = {{Mips::D6, Mips::D7}};
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+ auto NextGPR32 = GPR32ArgRegs.begin();
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+ auto NextFGR32 = FGR32ArgRegs.begin();
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+ auto NextAFGR64 = AFGR64ArgRegs.begin();
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struct AllocatedReg {
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const TargetRegisterClass *RC;
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