2018-05-04 03:05:41 +02:00
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{ stdenv, fetchFromGitHub
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2018-08-09 02:28:18 +02:00
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, pkgconfig, bison, flex
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, tcl, readline, libffi, python3
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2019-08-14 01:46:42 +02:00
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, protobuf, zlib
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2017-10-16 09:34:04 +02:00
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}:
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2015-12-29 17:31:18 +01:00
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2018-02-14 07:15:48 +01:00
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with builtins;
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2015-12-29 17:31:18 +01:00
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stdenv.mkDerivation rec {
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2019-08-14 01:46:42 +02:00
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pname = "yosys";
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version = "2019.08.13";
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2015-12-29 17:31:18 +01:00
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srcs = [
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(fetchFromGitHub {
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2018-02-04 18:59:19 +01:00
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owner = "yosyshq";
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2017-12-07 05:04:38 +01:00
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repo = "yosys";
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2019-08-14 01:46:42 +02:00
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rev = "19d6b8846f55b4c7be705619f753bec86deadac8";
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sha256 = "185sbkxajx3k9j03n0cxq2qvzwfwdbcxp19h8vnk7ghd5y9gp602";
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2017-12-07 05:04:38 +01:00
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name = "yosys";
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2015-12-29 17:31:18 +01:00
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})
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2018-02-14 07:15:48 +01:00
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# NOTE: the version of abc used here is synchronized with
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# the one in the yosys Makefile of the version above;
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# keep them the same for quality purposes.
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2018-05-04 03:05:41 +02:00
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(fetchFromGitHub {
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owner = "berkeley-abc";
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2017-12-07 05:04:38 +01:00
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repo = "abc";
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2019-08-14 01:46:42 +02:00
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rev = "5776ad07e7247993976bffed4802a5737c456782";
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sha256 = "1la4idmssg44rp6hd63sd5vybvs3vr14yzvwcg03ls37p39cslnl";
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2017-12-07 05:04:38 +01:00
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name = "yosys-abc";
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2015-12-29 17:31:18 +01:00
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})
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];
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sourceRoot = "yosys";
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2017-10-16 09:34:04 +02:00
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enableParallelBuilding = true;
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2017-09-05 23:26:13 +02:00
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nativeBuildInputs = [ pkgconfig ];
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2019-08-14 01:46:42 +02:00
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buildInputs = [ tcl readline libffi python3 bison flex protobuf zlib ];
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2018-08-09 02:28:18 +02:00
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makeFlags = [ "ENABLE_PROTOBUF=1" ];
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2018-02-14 07:15:48 +01:00
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patchPhase = ''
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2018-04-11 22:08:51 +02:00
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substituteInPlace ../yosys-abc/Makefile \
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--replace 'CC := gcc' ""
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2018-02-14 07:15:48 +01:00
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substituteInPlace ./Makefile \
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2018-04-11 22:08:51 +02:00
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--replace 'CXX = clang' "" \
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--replace 'ABCMKARGS = CC="$(CXX)"' 'ABCMKARGS =' \
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2018-02-14 07:15:48 +01:00
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--replace 'echo UNKNOWN' 'echo ${substring 0 10 (elemAt srcs 0).rev}'
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'';
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2015-12-29 17:31:18 +01:00
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preBuild = ''
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2016-08-19 03:30:21 +02:00
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chmod -R u+w ../yosys-abc
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ln -s ../yosys-abc abc
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2018-04-11 22:08:51 +02:00
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make config-${if stdenv.cc.isClang or false then "clang" else "gcc"}
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2015-12-29 17:31:18 +01:00
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echo 'ABCREV := default' >> Makefile.conf
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makeFlags="PREFIX=$out $makeFlags"
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2018-08-09 02:28:18 +02:00
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# we have to do this ourselves for some reason...
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(cd misc && ${protobuf}/bin/protoc --cpp_out ../backends/protobuf/ ./yosys.proto)
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2015-12-29 17:31:18 +01:00
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'';
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meta = {
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description = "Framework for RTL synthesis tools";
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longDescription = ''
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Yosys is a framework for RTL synthesis tools. It currently has
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extensive Verilog-2005 support and provides a basic set of
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synthesis algorithms for various application domains.
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Yosys can be adapted to perform any synthesis job by combining
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the existing passes (algorithms) using synthesis scripts and
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adding additional passes as needed by extending the yosys C++
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code base.
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'';
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2017-10-16 09:34:04 +02:00
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homepage = http://www.clifford.at/yosys/;
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license = stdenv.lib.licenses.isc;
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maintainers = with stdenv.lib.maintainers; [ shell thoughtpolice ];
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2018-04-11 22:08:51 +02:00
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platforms = stdenv.lib.platforms.unix;
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2015-12-29 17:31:18 +01:00
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};
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}
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