52 lines
1.7 KiB
Diff
52 lines
1.7 KiB
Diff
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--- lib/Support/Unix/Memory.inc
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+++ lib/Support/Unix/Memory.inc
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@@ -126,8 +126,12 @@
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Result.Address = Addr;
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Result.Size = NumPages*PageSize;
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- if (PFlags & MF_EXEC)
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- Memory::InvalidateInstructionCache(Result.Address, Result.Size);
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+ // Rely on protectMappedMemory to invalidate instruction cache.
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+ if (PFlags & MF_EXEC) {
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+ EC = Memory::protectMappedMemory (Result, PFlags);
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+ if (EC != std::error_code())
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+ return MemoryBlock();
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+ }
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return Result;
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}
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@@ -156,15 +160,31 @@
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return std::error_code(EINVAL, std::generic_category());
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int Protect = getPosixProtectionFlags(Flags);
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-
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uintptr_t Start = alignAddr((uint8_t *)M.Address - PageSize + 1, PageSize);
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uintptr_t End = alignAddr((uint8_t *)M.Address + M.Size, PageSize);
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+
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+ bool InvalidateCache = (Flags & MF_EXEC);
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+
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+#if defined(__arm__) || defined(__aarch64__)
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+ // Certain ARM implementations treat icache clear instruction as a memory read,
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+ // and CPU segfaults on trying to clear cache on !PROT_READ page. Therefore we need
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+ // to temporarily add PROT_READ for the sake of flushing the instruction caches.
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+ if (InvalidateCache && !(Protect & PROT_READ)) {
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+ int Result = ::mprotect((void *)Start, End - Start, Protect | PROT_READ);
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+ if (Result != 0)
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+ return std::error_code(errno, std::generic_category());
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+
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+ Memory::InvalidateInstructionCache(M.Address, M.Size);
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+ InvalidateCache = false;
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+ }
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+#endif
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+
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int Result = ::mprotect((void *)Start, End - Start, Protect);
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if (Result != 0)
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return std::error_code(errno, std::generic_category());
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- if (Flags & MF_EXEC)
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+ if (InvalidateCache)
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Memory::InvalidateInstructionCache(M.Address, M.Size);
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return std::error_code();
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